ZHCSJ47E March 2017 – December 2018 DRA76P , DRA77P
ADVANCE INFORMATION for pre-production products; subject to change without notice.
All input and output timing parameters are referenced to Vref for both "0" and "1" logic levels. Vref = (VDD I/O)/2.
Figure 5-3 Input and Output Voltage Reference Levels for AC Timing Measurements All rise and fall transition timing parameters are referenced to VIL MAX and VIH MIN for input clocks, VOL MAX and VOH MIN for output clocks.
Figure 5-4 Rise and Fall Transition Time Voltage Reference Levels