ZHCSJ47E March 2017 – December 2018 DRA76P , DRA77P
ADVANCE INFORMATION for pre-production products; subject to change without notice.
Table 5-65 and Table 5-66 assume testing over the recommended operating conditions and electrical characteristic conditions below (see Figure 5-45, Figure 5-46 and Figure 5-47).
| NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
|---|---|---|---|---|---|
| HDQ10 | tPDH | Presence pulse delay high | 15 | 60 | µs |
| HDQ11 | tPDL | Presence pulse delay low | 60 | 240 | µs |
| HDQ12 | tRDV | Read data valid time | tLOWR | 15 | µs |
| HDQ13 | tREL | Read data release time | 0 | 45 | µs |
| NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
|---|---|---|---|---|---|
| HDQ14 | tRSTL | Reset time low | 480 | 960 | µs |
| HDQ15 | tRSTH | Reset time high | 480 | µs | |
| HDQ16 | tSLOT | Bit cycle time | 60 | 120 | µs |
| HDQ17 | tLOW1 | Write bit-one time | 1 | 15 | µs |
| HDQ18 | tLOW0 | Write bit-zero time(2) | 60 | 120 | µs |
| HDQ19 | tREC | Recovery time | 1 | µs | |
| HDQ20 | tLOWR | Read bit strobe time(1) | 1 | 15 | µs |
Figure 5-45 1-Wire—Break (Reset)
Figure 5-46 1-Wire—Read Bit (Data)
Figure 5-47 1-Wire—Write Bit-One Timing (Command / Address or Data)