ZHCSJ47E March 2017 – December 2018 DRA76P , DRA77P
ADVANCE INFORMATION for pre-production products; subject to change without notice.
| NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
|---|---|---|---|---|---|
| MII1 | tsu(RXD-RX_CLK) | Setup time, receive selected signals valid before miin_rxclk | 8 | ns | |
| tsu(RX_DV-RX_CLK) | |||||
| tsu(RX_ER-RX_CLK) | |||||
| MII2 | th(RX_CLK-RXD) | Hold time, receive selected signals valid after miin_rxclk | 8 | ns | |
| th(RX_CLK-RX_DV) | |||||
| th(RX_CLK-RX_ER) |
Figure 5-70 GMAC Receive Interface Timing MIIn Operation Table 5-100 and Figure 5-71 present timing requirements for GMAC MIIn transmit 10/100Mbit/s.