ZHCSJ47E March 2017 – December 2018 DRA76P , DRA77P
ADVANCE INFORMATION for pre-production products; subject to change without notice.
Table 5-63 and Table 5-64 assume testing over the recommended operating conditions and electrical characteristic conditions below (see Figure 5-41, Figure 5-42, Figure 5-43, and Figure 5-44).
| NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
|---|---|---|---|---|---|
| HDQ1 | tCYCH | Read bit window timing | 190 | 250 | µs |
| HDQ2 | tHW1 | Read one data valid after HDQ low | 32(2) | 66(2) | µs |
| HDQ3 | tHW0 | Read zero data hold after HDQ low | 70(2) | 145(2) | µs |
| HDQ4 | tRSPS | Response time from HDQ slave device(1) | 190 | 320 | µs |
| NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
|---|---|---|---|---|---|
| HDQ5 | tB | Break timing | 190 | µs | |
| HDQ6 | tBR | Break recovery time | 40 | µs | |
| HDQ7 | tCYCD | Write bit windows timing | 190 | µs | |
| HDQ8 | tDW1 | Write one data valid after HDQ low | 0.5 | 50 | µs |
| HDQ9 | tDW0 | Write zero data hold after HDQ low | 86 | 145 | µs |
Figure 5-41 HDQ Break and Break Recovery Timing — HDQ Interface Writing to Slave
Figure 5-42 Device HDQ Interface Bit Read Timing (Data)
Figure 5-43 Device HDQ Interface Bit Write Timing (Command / Address or Data)
Figure 5-44 HDQ Communication Timing