ZHCSG17B January 2017 – July 2019 LMK04610
PRODUCTION DATA.
The PLL2_DLD_EN Register supports PLL2 DLD EN Feature Back to Register Map.
| BIT NO. | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| [7:2] | RSRVD | RW | 0 | Reserved |
| [1] | PLL2_DLD_EN | RW | 0 | Enable for PLL2 DLD
0: Non PLL2 modes 1: PLL2 DLD enabled |
| [0] | RSRVD | RW | 0 | Reserved |