ZHCSG17B January 2017 – July 2019 LMK04610
PRODUCTION DATA.
The IOTEST_SCL Register provides control of the SCL driver and test features. Return to Register Map.
| BIT NO. | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| [7:6] | RSRVD | - | - | Reserved. |
| [5] | SPI_SCL_ENB_INSTAGE | RW | 0 | SPI SCL Input Stage Enable BAR. When SPI_SCL_INPUT_ENB is 0 the SCL Input stage is enabled. Whenever SPI_SCL_INPUT_ENB is set to 1 the SPI interface is rendered inoperable and can only be recovered by a hardware reset. |
| [4] | SPI_SCL_EN_ML_INSTAGE | RW | 0 | SPI SCL Input Stage Enable Multi-level. When SPI_SCL_INPUT_ENML is 1 the input stage is configured for multi-level mode. |
| [3:2] | RSRVD | - | - | Reserved. |
| [1] | SPI_SCL_INPUT_Y12 | R | 0 | SPI SCL Input Y12 Value. Indicates the logic level present on the SCL Y12 pin. This feature is currently not supported. |
| [0] | SPI_SCL_INPUT_M12 | R | 0 | SPI SCL Input M12 Value. Indicates the logic level present on the SCL M12 pin. This feature is currently not supported. |