ZHCSJ33F December 2015 – May 2019 DRA745 , DRA746 , DRA750 , DRA756
PRODUCTION DATA.
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Table 5-14 summarizes the DC electrical characteristics for LVCMOS OSC Buffers.
| PARAMETER | MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|---|
| Signal Names in MUXMODE 0: rtc_osc_xi_clkin32 / rtc_osc_xo; | ||||||
| Balls: AE14 / AD14; | ||||||
| 1.8-V Mode | ||||||
| VIH | Input high-level threshold | 0.65 * VDDS | V | |||
| VIL | Input low-level threshold | 0.35 * VDDS | V | |||
| VHYS | Input hysteresis voltage | 150 | mV | |||
| CPAD | Pad capacitance (including package capacitance) | 3 | pF | |||