ZHCSJ33F December 2015 – May 2019 DRA745 , DRA746 , DRA750 , DRA756
PRODUCTION DATA.
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Table 8-25 shows the stackup and feature sizes required for these types of PCIe connections.
| PARAMETER | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|
| Number of ground plane cuts allowed within PCIe routing region | - | - | 0 | Cuts |
| Number of layers between PCIe routing area and reference plane (1) | - | - | 0 | Layers |
| PCB Routing clearance | 4 | Mils | ||
| PCB Trace width | 4 | Mils |