ZHCS488K October 2011 – December 2018 AM3351 , AM3352 , AM3354 , AM3356 , AM3357 , AM3358 , AM3359
PRODUCTION DATA.
Table 7-66 lists the clock net classes for the DDR3 interface. Table 7-67 lists the signal net classes, and associated clock net classes, for signals in the DDR3 interface. These net classes are used for the termination and routing rules that follow.
| CLOCK NET CLASS | AM335x PIN NAMES |
|---|---|
| CK | DDR_CK and DDR_CKn |
| DQS0 | DDR_DQS0 and DDR_DQSn0 |
| DQS1 | DDR_DQS1 and DDR_DQSn1 |
| SIGNAL NET CLASS | ASSOCIATED CLOCK NET CLASS | AM335x PIN NAMES |
|---|---|---|
| ADDR_CTRL | CK | DDR_BA[2:0], DDR_A[15:0], DDR_CSn0, DDR_CASn, DDR_RASn, DDR_WEn, DDR_CKE, DDR_ODT |
| DQ0 | DQS0 | DDR_D[7:0], DDR_DQM0 |
| DQ1 | DQS1 | DDR_D[15:8], DDR_DQM1 |