SLVK225 August 2025 TPS7H5020-SEP
The primary concern for the TPS7H5020-SEP is the robustness against the destructive single-event effects (DSEE): single-event latch-up (SEL), single-event burnout (SEB), and single-event gate rupture (SEGR). In mixed technologies such as the BiCMOS process used on the TPS7H5020-SEP , the CMOS circuitry introduces a potential for SEL susceptibility.
SEL can occur if excess current injection caused by the passage of an energetic ion is high enough to trigger the formation of a parasitic cross-coupled PNP and NPN bipolar structure (formed between the p-sub and n-well and n+ and p+ contacts) [1,2]. The parasitic bipolar structure initiated by a single-event creates a high-conductance path (inducing a steady-state current that is typically orders-of-magnitude higher than the normal operating current) between power and ground that persists (is “l(fā)atched”) until power is removed, the device is reset, or until the device is destroyed by the high-current state. The TPS7H5020-SEP was tested for SEL at the maximum recommended operating conditions of VIN=PVIN=14V and VLDO=5.5V for the silicon mode and VIN=14V and PVIN=VLDO=5.5V for the GaN mode. During testing of the 6 devices, the TPS7H5020-SEP did not exhibit any SEL with heavy-ions with LETEFF = 48 MeV·cm2 /mg at flux ≈105 ions/(cm2×s), fluence of ≈107 ions/cm2, and a die temperature of 125°C.
The TPS7H5020-SEP was evaluated for SEB/SEGR at a maximum voltage of 14V in the enabled and disabled mode. Because it has been shown that the MOSFET susceptibility to burnout decrement with temperature [5], the device was evaluated while operating under room temperatures. The device was tested with no external thermal control device. The TPS7H5020-SEP was tested for SEB at the maximum recommended operating conditions of VIN=PVIN=14V and VLDO=5.5V for the silicon mode and VIN=14V and PVIN=VLDO=5.5V for the GaN mode. The device was also tested for SEB Off by disabling the device. During the SEB/SEGR testing, not a single current event was observed, demonstrating that the TPS7H5020-SEP is SEB/SEGR-free up to LETEFF = 48 MeV·cm2/mg at a flux of ≈105 ions/(cm2×s), fluences of ≈107 ions/cm2, and a die temperature of ≈25°C.
The TPS7H5020-SEP was characterized for SET at flux of ≈1 × 105 ions/(cm2×s) , fluences of 107 ions/cm2, and room temperature. The device was characterized at VIN of 12V for the silicon mode and 5V for the GaN mode. Heavy-ions with LETEFF of 48 MeV·cm2/mg were used to characterize the transient performance. To see the SET results of the TPS7H5020-SEP, please refer to Single-Event Transients (SET).