ZHCSO96B June 2021 – June 2022 DAC12DL3200
PRODUCTION DATA
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage | VDDA18A, VDDA18B(2) | -0.3 | 2.45 | V |
| VEEAM18, VEEBM18(2) | -2.0 | 0.3 | V | |
| VDDA(2) | -0.3 | 1.3 | V | |
| VDDCLK18, VDDSYS18(3) | -0.3 | 2.45 | V | |
| VDDHAF, VDDL2B, VDDL2A, VDDCLK10(3) | -0.3 | 1.3 | V | |
| Supply voltage range, VDDIO18, VQPS(4) | -0.3 | 2.45 | V | |
| VDDDIG, VDDEB, VDDEA(4) | -0.3 | 1.3 | V | |
| Voltage between any combination of AGND, DGND and VSSCLK | -0.1 | 0.1 | V | |
| Input voltage | DA[11:0]+, DA[11:0]–, DACLK+, DACLK–, DASTR+, DASTR–, DB[11:0]+, DB[11:0]–, DBCLK+, DBCLK–, DBSTR+, DBSTR–, DC[11:0]+, DC[11:0]–, DCCLK+, DCCLK–, DCSTR+, DCSTR–, DD[11:0]+, DD[11:0]–, DDCLK+, DDCLK–, DDSTR+, DDSTR–(4) | -0.3 | VDDIO18+0.3 | V |
| CLK+, CLK–(3) | -0.3 | VDDCLK18+0.3 | ||
| SYSREF+, SYSREF–(3) | -0.3 | VDDSYS18+0.3 | ||
| SCLK, SCS, SDI, RESET, NCOBANKSEL, NCOSEL[0:3], SLEEP, SYNC, TESTMODE, TXENABLE(4) | -0.3 | VDDIO18+0.3 | ||
| Output voltage | VOUTA+, VOUTA–(2) | -0.3 | VDDA18A + 0.5 | V |
| VOUTB+, VOUTB–(2) | -0.3 | VDDA18B + 0.5 | ||
| ATEST, EXTIO, RBIAS(2) | -0.3 | VDDA18A + 0.3 | ||
| SDI, SDO, ALARM, TRIGCLK(4) | -0.3 | VDDIO18 + 0.3 | ||
| Junction temperature, TJ | 150 | °C | ||
| Storage temperature, Tstg | -65 | 150 | °C | |