ZHCSY43 April 2025 ADC3664-EP , ADC3664-SEP
PRODUCTION DATA
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| 寄存器 地址 | 寄存器數(shù)據(jù) | |||||||
|---|---|---|---|---|---|---|---|---|
| A[11:0] | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0x00 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 復(fù)位 |
| 0x07 | OP IF MAPPER | 0 | OP IF EN | OP IF SEL | ||||
| 0x08 | 0 | 0 | PDN CLKBUF | PDN REFAMP | 0 | PDN A | PDN B | PDN GLOBAL |
| 0x09 | 0 | 0 | PDN FCLKOUT | PDN DCLKOUT | PDN DA1 | PDN DA0 | PDN DB1 | PDN DB0 |
| 0x0D | 0 | 0 | 0 | 0 | MASK CLKBUF | MASK REFAMP | MASK BG DIS | 0 |
| 0x0E | SYNC PIN EN | SPI SYNC | SPI SYNC EN | 0 | REF CTRL | REF SEL | SE CLK EN | |
| 0x11 | 0 | 0 | SE A | SE B | 0 | 0 | 0 | 0 |
| 0x13 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | E-FUSE LD |
| 0x14 | CUSTOM PAT [7:0] | |||||||
| 0x15 | CUSTOM PAT [15:8] | |||||||
| 0x16 | TEST PAT B | TEST PAT A | CUSTOM PAT [17:16] | |||||
| 0x19 | FCLK SRC | 0 | 0 | FCLK DIV | 0 | 0 | 0 | TOG FCLK |
| 0x1A | 0 | LVDS ? 擺幅 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0x1B | MAPPER EN | 20B EN | BIT MAPPER RES | 0 | 0 | 0 | ||
| 0x1E | 0 | 0 | 0 | 0 | LVDS DATA DEL | LVDS DCLK DEL | ||
| 0x20 | FCLK PAT [7:0] | |||||||
| 0x21 | FCLK PAT [15:8] | |||||||
| 0x22 | 0 | 0 | 0 | 0 | FCLK PAT [19:16] | |||
| 0x24 | 0 | 0 | CH AVG EN | DDC 多路復(fù)用器 | DIG BYP | DDC EN | 0 | |
| 0x25 | DDC MUX EN | DECIMATION | REAL OUT | 0 | 0 | MIX PHASE | ||
| 0x26 | MIX GAIN A | MIX RES A | FS /4 MIX A | MIX GAIN B | MIX RES B | FS/4 MIX B | ||
| 0x27 | 0 | 0 | 0 | OP ORDER A | Q-DEL A | FS/4 MIX PH A | 0 | 0 |
| 0x2A | NCO A [7:0] | |||||||
| 0x2B | NCO A [15:8] | |||||||
| 0x2C | NCO A [23:16] | |||||||
| 0x2D | NCO A [31:24] | |||||||
| 0x2E | 0 | 0 | 0 | OP ORDER B | Q-DEL B | FS/4 MIX PH B | 0 | 0 |
| 0x31 | NCO B [7:0] | |||||||
| 0x32 | NCO B [15:8] | |||||||
| 0x33 | NCO B [23:16] | |||||||
| 0x34 | NCO B [31:24] | |||||||
| 0x39..0x60 | OUTPUT BIT MAPPER CHA | |||||||
| 0x61..0x88 | OUTPUT BIT MAPPER CHB | |||||||
| 0x8F | 0 | 0 | 0 | 0 | 0 | 0 | FORMAT A | 0 |
| 0x92 | 0 | 0 | 0 | 0 | 0 | 0 | FORMAT B | 0 |