ZHCS986B May 2012 – December 2018 TLV320DAC3203
PRODUCTION DATA.
Table 1 shows the possible allocation of pins for specific functions. The PLL input, for example, can be programmed to be any of 4 pins (MCLK, BCLK, DIN, GPIO).
| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | ||
|---|---|---|---|---|---|---|---|---|---|
| Pin Function | MCLK | BCLK | WCLK | DIN
MFP1 |
DOUT
MFP2 |
MFP3/
SCLK |
MFP4/
MISO |
GPIO
MFP5 |
|
| A | PLL Input | S(2) | S(3) | E | S(4) | ||||
| B | Codec Clock Input | S(2),D(5) | S(3) | S(4) | |||||
| C | I2S BCLK input | S,D | |||||||
| D | I2S BCLK output | E(1) | |||||||
| E | I2S WCLK input | E, D | |||||||
| F | I2S WCLK output | E | |||||||
| G | I2S ADC word clock input | E | E | ||||||
| H | I2S ADC WCLK out | E | E | ||||||
| I | I2S DIN | E, D | |||||||
| J | I2S DOUT | E, D | |||||||
| K | General Purpose Output I | E | |||||||
| K | General Purpose Output II | E | |||||||
| K | General Purpose Output III | E | |||||||
| L | General Purpose Input I | E | |||||||
| L | General Purpose Input II | E | |||||||
| L | General Purpose Input III | E | |||||||
| M | INT1 output | E | E | E | |||||
| N | INT2 output | E | E | E | |||||
| Q | Secondary I2S BCLK input | E | E | ||||||
| R | Secondary I2S WCLK in | E | E | ||||||
| S | Secondary I2S DIN | E | E | ||||||
| T | Secondary I2S DOUT | E | |||||||
| U | Secondary I2S BCLK OUT | E | E | E | |||||
| V | Secondary I2S WCLK OUT | E | E | E | |||||
| X | Aux Clock Output | E | E | E |