ZHCSHY8 March 2018 LP87561-Q1 , LP87562-Q1 , LP87563-Q1 , LP87564-Q1 , LP87565-Q1
PRODUCTION DATA.
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Address: 0x1E
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| Reserved | SYNC_CLK
_STAT |
TDIE_SD
_STAT |
TDIE_WARN
_STAT |
OVP_STAT | Reserved | ||
| Bits | Field | Type | Default | Description |
|---|---|---|---|---|
| 7:5 | Reserved | R | 0h | |
| 4 | SYNC_CLK_STAT | R | 0h | Status bit indicating the status of the external clock (CLKIN).
0h = External clock frequency is valid 1h = External clock frequency is not valid |
| 3 | TDIE_SD_STAT | R | 0h | Status bit indicating the status of the thermal shutdown condition.
0h = Die temperature is less than the thermal shutdown level 1h = Die temperature is greater than the thermal shutdown level |
| 2 | TDIE_WARN_STAT | R | 0h | Status bit indicating the status of thermal warning condition.
0h = Die temperature is less than the thermal warning level 1h = Die temperature is greater than the thermal warning level |
| 1 | OVP_STAT | R | 0h | Status bit indicating the status of input overvoltage monitoring.
0h = Input voltage is less than the overvoltage threshold level 1h = Input voltage is greater than the overvoltage threshold level |
| 0 | Reserved | R | 0h |