ZHCSHY8 March 2018 LP87561-Q1 , LP87562-Q1 , LP87563-Q1 , LP87564-Q1 , LP87565-Q1
PRODUCTION DATA.
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Address: 0x19
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| DOUBLE_DELAY | CLKIN_PD | Reserved | EN3_PD | TDIE_WARN_
LEVEL |
EN2_PD | EN1_PD | Reserved |
| Bits | Field | Type | Default | Description |
|---|---|---|---|---|
| 7 | DOUBLE_DELAY | R/W | X | Start-up and shutdown delays from the ENx signals
0h = 0 ms to 15 ms with 1-ms steps 1h = 0 ms to 30 ms with 2-ms steps |
| 6 | CLKIN_PD | R/W | X | This bit selects the pulldown resistor on the CLKIN input pin.
0h = Pulldown resistor is disabled 1h = Pulldown resistor is enabled |
| 5 | Reserved | R/W | 0h | |
| 4 | EN3_PD | R/W | X | This bit selects the pulldown resistor on the EN3 (GPIO3) input pin.
0h = Pulldown resistor is disabled 1h = Pulldown resistor is enabled |
| 3 | TDIE_WARN_LEVEL | R/W | X | Thermal warning threshold level
0h = 125°C 1h = 137°C |
| 2 | EN2_PD | R/W | X | This bit selects the pulldown resistor on the EN2 (GPIO2) input pin.
0h = Pulldown resistor is disabled 1h = Pulldown resistor is enabled |
| 1 | EN1_PD | R/W | X | This bit selects the pulldown resistor on the EN1 (GPIO1) input pin.
0h = Pulldown resistor is disabled 1h = Pulldown resistor is enabled |
| 0 | Reserved | R/W | 0h |