ZHCSCX2E January 2014 – October 2017 LM15851
PRODUCTION DATA.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | RDEL | ||||||
| R/W-1000 | R/W-0000 | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-4 | RESERVED | R/W | 1000 | Default: 1000b |
| 3-0 | RDEL | R/W | 0000 | Adjusts the delay of the SYSREF input signal with respect to DEVCLK. Each step delays SYSREF by 20 ps (nominal) Default: 0 Range: 0 to 15 decimal |