Product details

Function Clock buffer, Differential Additive RMS jitter (typ) (fs) 50 Output frequency (max) (MHz) 2000 Number of outputs 4 Output supply voltage (V) 1.8, 2.5, 3.3 Core supply voltage (V) 1.8, 2.5, 3.3 Output skew (ps) 20 Features Dual 1:4 fanout, Output enable control, Universal inputs Operating temperature range (°C) -40 to 105 Rating Catalog Output type LVDS Input type HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL
Function Clock buffer, Differential Additive RMS jitter (typ) (fs) 50 Output frequency (max) (MHz) 2000 Number of outputs 4 Output supply voltage (V) 1.8, 2.5, 3.3 Core supply voltage (V) 1.8, 2.5, 3.3 Output skew (ps) 20 Features Dual 1:4 fanout, Output enable control, Universal inputs Operating temperature range (°C) -40 to 105 Rating Catalog Output type LVDS Input type HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL
VQFN (RHD) 28 25 mm2 5 x 5
  • High-performance LVDS clock buffer family: up to 2 GHz
    • Dual 1:2 differential buffer
    • Dual 1:4 differential buffer
  • Supply voltage: 1.71 V to 3.465 V
  • Fail-safe input operation
  • Low additive jitter: < max 60 fs RMS in 12-kHz to 20-MHz @ 156.25 MHz

    • Very low phase noise floor: -164 dBc/Hz (typical)

  • Very low propagation delay < 575 ps max

  • Output skew of 20 ps max

  • Universal inputs accept LVDS, LVPECL, LVCMOS, HCSL and CML signal levels.
  • LVDS reference voltage, VAC_REF, available for capacitive coupled inputs
  • Industrial temperature range: –40°C to 105°C
  • Packaged in

    • LMK1D2102: 3-mm x 3-mm, 16-Pin VQFN

    • LMK1D2104: 5-mm x 5-mm, 28-Pin VQFN
  • High-performance LVDS clock buffer family: up to 2 GHz
    • Dual 1:2 differential buffer
    • Dual 1:4 differential buffer
  • Supply voltage: 1.71 V to 3.465 V
  • Fail-safe input operation
  • Low additive jitter: < max 60 fs RMS in 12-kHz to 20-MHz @ 156.25 MHz

    • Very low phase noise floor: -164 dBc/Hz (typical)

  • Very low propagation delay < 575 ps max

  • Output skew of 20 ps max

  • Universal inputs accept LVDS, LVPECL, LVCMOS, HCSL and CML signal levels.
  • LVDS reference voltage, VAC_REF, available for capacitive coupled inputs
  • Industrial temperature range: –40°C to 105°C
  • Packaged in

    • LMK1D2102: 3-mm x 3-mm, 16-Pin VQFN

    • LMK1D2104: 5-mm x 5-mm, 28-Pin VQFN

The LMK1D210x clock buffer distributes two clock inputs (IN0 and IN1) to a total of up to 8 pairs of differential LVDS clock outputs (OUT0, OUT7) with minimum skew for clock distribution. Each buffer block consists of one input and up to 4 LVDS outputs. The inputs can either be LVDS, LVPECL, HCSL, CML or LVCMOS.

The LMK1D210x is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single-ended mode, the appropriate bias voltage as shown in Figure 9-6 must be applied to the unused negative input pin.

Using the control pin (EN), output banks can either be enabled or disabled. If this pin is left open, two buffers with all outputs are enabled, if switched to a logic "0", both banks with all outputs are disabled (static logic "0"), if switched to a logic "1", one bank and its outputs are disabled while another bank with its outputs are enabled. The part supports a fail-safe function. The device further incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.

The device operates in 1.8-V or 2.5-V or 3.3-V supply environment and is characterized from –40°C to 105°C (ambient temperature). The LMK1D210x package variant is shown in the table below:

The LMK1D210x clock buffer distributes two clock inputs (IN0 and IN1) to a total of up to 8 pairs of differential LVDS clock outputs (OUT0, OUT7) with minimum skew for clock distribution. Each buffer block consists of one input and up to 4 LVDS outputs. The inputs can either be LVDS, LVPECL, HCSL, CML or LVCMOS.

The LMK1D210x is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single-ended mode, the appropriate bias voltage as shown in Figure 9-6 must be applied to the unused negative input pin.

Using the control pin (EN), output banks can either be enabled or disabled. If this pin is left open, two buffers with all outputs are enabled, if switched to a logic "0", both banks with all outputs are disabled (static logic "0"), if switched to a logic "1", one bank and its outputs are disabled while another bank with its outputs are enabled. The part supports a fail-safe function. The device further incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.

The device operates in 1.8-V or 2.5-V or 3.3-V supply environment and is characterized from –40°C to 105°C (ambient temperature). The LMK1D210x package variant is shown in the table below:
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* Data sheet LMK1D210x Low Additive Jitter LVDS Buffer datasheet (Rev. B) PDF | HTML 14 Jun 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

LMK1D1208EVM — LMK1D1208 evaluation module for low jitter 2:8 LVDS fan-out buffer

LMK1D1208 is a high-performance, low additive jitter LVDS clock buffer with two differential inputs and eight LVDS outputs. This evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1D1208. This EVM can also be used to evaluate other 28-pin devices within the (...)
User guide: PDF | HTML
Not available on TI.com
Simulation model

LMK1DX IBIS Model (Rev. B)

SNAM251B.ZIP (67 KB) - IBIS Model
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Design tool

PLLATINUMSIM-SW — PLLatinum Sim Tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

Supported products & hardware

Supported products & hardware

Products
Clock buffers
CDCDB2000 — DB2000QL compliant 20-output clock buffer for PCIe® Gen 1 to Gen 5 CDCDB400 — 4-output clock buffer for PCIe® Gen 1 to Gen 6 CDCDB800 — 8-output clock buffer for PCIe® Gen 1 to Gen 6 CDCDB803 — 8-output clock buffer for PCIe® Gen 1 to Gen 6 with selectable SMBus addresses CDCLVC1102 — Low jitter, 1:2 LVCMOS fan-out clock buffer CDCLVC1103 — Low jitter, 1:3 LVCMOS fan-out clock buffer CDCLVC1104 — Low jitter, 1:4 LVCMOS fan-out clock buffer CDCLVC1106 — Low jitter, 1:6 LVCMOS fan-out clock buffer CDCLVC1108 — Low jitter, 1:8 LVCMOS fan-out clock buffer CDCLVC1110 — Low jitter, 1:10 LVCMOS fan-out clock buffer CDCLVC1112 — Low jitter, 1:12 LVCMOS fan-out clock buffer CDCLVC1310 — Universal input, 10-output low impedance LVCMOS buffer CDCLVD110A — 1-to-10 LVDS clock buffer up to 1100-MHz with minimum skew for clock distribution CDCLVD1204 — Low jitter, 2-input selectable 1:4 universal-to-LVDS buffer CDCLVD1208 — Low jitter, 2-input selectable 1:8 universal-to-LVDS buffer CDCLVD1212 — Low jitter, 2-input selectable 1:12 universal-to-LVDS buffer CDCLVD1213 — Low jitter, 1:4 universal-to-LVDS buffer with selectable output divider CDCLVD1216 — Low jitter, 2-input selectable 1:16 universal-to-LVDS buffer CDCLVD2102 — Low jitter, dual 1:2 universal-to-LVDS buffer CDCLVD2104 — Low jitter, dual 1:4 universal-to-LVDS buffer CDCLVD2106 — Low jitter, dual 1:6 universal-to-LVDS buffer CDCLVD2108 — Low jitter, dual 1:8 universal-to-LVDS buffer CDCLVP110 — 1:10 LVPECL/HSTL to LVPECL clock driver CDCLVP1102 — Low jitter 1:2 universal-to-LVPECL buffer CDCLVP111 — 1:10 LVPECL buffer with selectable input CDCLVP111-EP — HiRel, 1:10 LVPECL buffer with selectable input CDCLVP111-SEP — Radiation-tolerant 1:10 LVPECL high-speed clock buffer with selectable input clock driver CDCLVP111-SP — 1:10 high speed clock buffer with selectable input clock driver CDCLVP1204 — Low-jitter, two-input, selectable 1:4 universal-to-LVPECL buffer CDCLVP1208 — Low jitter, 2-input selectable 1:8 universal-to-LVPECL buffer CDCLVP1212 — Low jitter, 2-input selectable 1:12 universal-to-LVPECL buffer CDCLVP1216 — Low jitter, 2-input selectable 1:16 universal-to-LVPECL buffer CDCLVP2102 — Low jitter, dual 1:2 universal-to-LVPECL buffer CDCLVP2104 — Low jitter, dual 1:4 universal-to-LVPECL buffer CDCLVP2106 — Low jitter, dual 1:6 universal-to-LVPECL buffer CDCLVP2108 — Low jitter, dual 1:8 universal-to-LVPECL buffer CDCLVP215 — Dual 1:5 high speed LVPECL fan out buffer LMK00301 — 3-GHz, 10-output differential fanout buffer / level translator LMK00304 — 3.1-GHz differential clock buffer/level translator with 4 configurable outputs LMK00306 — 3.1-GHz differential clock buffer/level translator with 6 configurable outputs LMK00308 — 3.1-GHz differential clock buffer/level translator with 8 configurable outputs LMK00334 — 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00334-Q1 — Automotive 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00338 — 8-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK1C1102 — 2-channel output LVCMOS 1.8-V buffer LMK1C1102A — 1.8V,2.5V or 3.3V asynchronous 2 channel output LVCMOS buffer LMK1C1103 — 3-channel output LVCMOS 1.8-V buffer LMK1C1103A — 1.8V,2.5V or 3.3V asynchronous 3 channel output LVCMOS buffer LMK1C1104 — 4-channel output LVCMOS 1.8-V buffer LMK1C1104A — 1.8V,2.5V or 3.3V asynchronous 4 channel output LVCMOS buffer LMK1C1106 — 6-channel output LVCMOS 1.8-V buffer LMK1C1106A — 1.8V,2.5V or 3.3V asynchronous 6 channel output LVCMOS buffer LMK1C1108 — 8-channel output LVCMOS 1.8-V buffer LMK1C1108A — 1.8V,2.5V or 3.3V asynchronous 8 channel output LVCMOS buffer LMK1D1204 — 4-channel output LVDS 1.8-V buffer LMK1D1204P — 4-channel output LVDS 1.8-V, 2.5-V, and 3.3-V?buffer with pin control LMK1D1208 — 8-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer LMK1D1208I — 8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I2C LMK1D1208P — 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer with pin control LMK1D1212 — 12-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D1216 — 16-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D2102 — Dual bank 2-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer LMK1D2102L — Low additive jitter LVDS buffer LMK1D2104 — Dual bank 4-channel output 1.8V, 2.5V and 3.3V LVDS buffer LMK1D2104L — Dual bank 4-channel output LVDS 1.8V, 2.5V, and 3.3V buffer with 0.7V output common mode option LMK1D2106 — Dual bank 6-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D2106L — Dual bank 2-channel output LVDS 1.8V, 2.5V and 3.3V buffer with 0.7V output common mode option LMK1D2108 — Dual bank 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
Clock generators
LMK03318 — Ultra-low jitter clock generator family with single PLL LMK03328 — Ultra-low jitter clock generator family with two independent PLLs LMK3C0105 — 5 output reference-less clock generator with bulk acoustic wave (BAW) LMK3C0105-Q1 — Automotive, 5 output reference-less clock generator with bulk acoustic wave (BAW) LMK3H0102 — Bulk acoustic wave (BAW)-based PCIe Gen 1 to Gen 7-compliant referenceless clock generator LMK3H0102-Q1 — Automotive PCIe gen 7 compliant, reference-less clock generator with bulk acoustic wave (BAW) LMK3H2104 — 4-output, PCIe Gen 1 to Gen 7 compliant, BAW reference-less clock generator, clock mux and buffer LMK3H2108 — 8-output, PCIe Gen 1 to Gen 7 compliant, BAW reference-less clock generator, clock mux and buffer
Clock jitter cleaners
LMK04803 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 1.9-GHz VCO LMK04805 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.2-GHz VCO LMK04806 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.5-GHz VCO LMK04808 — Low-noise clock jitter cleaner with dual loop PLLs and integrated 2.9-GHz VCO LMK04816 — Three input low-noise clock jitter cleaner with dual loop PLLs LMK04821 — Ultra low jitter synthesizer and jitter cleaner with JESD204B support LMK04826 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 1840 to1970-MHz VCO0 LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0. LMK04828-EP — Ultra low-noise JESD204B compliant clock jitter cleaner with temperature range -55 to 105c LMK04832 — Ultra-low-noise, 3.2-GHz, 15-output, JESD204B clock jitter cleaner with dual loop LMK04832-SEP — Radiation-tolerant, 30-krad, ultra-low-noise, 3.2-GHz 15-output JESD204C clock jitter cleaner LMK04832-SP — Radiation-hardened-assured (RHA), ultra-low-noise, 3.2-GHz, 15-output clock jitter cleaner
Oscillators
LMK60A0-148351 — 148.352-MHz, LVDS, high-performance, low jitter, differential oscillator LMK60A0-148M — 148.5-MHz, LVDS, high-performance, low jitter, differential oscillator LMK60E0-156257 — 156.257-MHz, LVPECL, ±25 ppm, high-performance, low-jitter oscillator LMK60E0-156M — 156.5-MHz, LVPECL, ±25 ppm, high-performance, low-jitter oscillator LMK60E0-212M — 212.5-MHz, LVPECL, ±25 ppm, high-performance, low-jitter oscillator LMK60E2-100M — 100.0-MHz, LVPECL, ±50 ppm, high-performance, low-jitter oscillator LMK60E2-125M — 125-MHz, LVPECL, ±50 ppm, high-performance, low-jitter oscillator LMK60E2-150M — 150-MHz, LVPECL, ±50 ppm, low jitter, standard oscillator LMK60E2-156M — 156.25-MHz, LVPECL, ±50 ppm, high-performance, low-jitter oscillator LMK60I2-100M — 100-MHz, HCSL, ±50 ppm, high-performance, low-jitter oscillator LMK60I2-322M — 322.27-MHz, HCSL, ±50 ppm, high-performance, low-jitter oscillator LMK61A2-100M — 100-MHz, ±50 ppm, LVDS ultra-low jitter standard differential oscillator LMK61A2-125M — 125-MHz, ±50 ppm, LVDS ultra-low jitter standard differential oscillator LMK61A2-156M — 156.25-MHz, ±50 ppm, LVDS ultra-low jitter standard differential oscillator LMK61A2-312M — 312.5-MHz, ±50 ppm, LVDS ultra-low jitter standard differential oscillator LMK61A2-644M — LVDS ultra-low jitter programmable oscillator with internal EEPROM LMK61E0-050M — 50-MHz, LVPECL ±25 ppm, ultra-low jitter, standard differential oscillator LMK61E0-155M — 155.52-MHz, LVPECL ±25 ppm, ultra-low jitter, standard differential oscillator LMK61E0-156M — 156.25-MHz, ±25 ppm, LVPECL ultra-low jitter standard differential oscillator LMK61E07 — Multi-signal format, ultra-low jitter programmable oscillator with internal EEPROM LMK61E08 — Ultra-low jitter programmable oscillator with internal EEPROM LMK61E0M — LVCMOS ultra-low jitter programmable oscillator with internal EEPROM LMK61E2 — Ultra-low jitter, EEPROM programmable oscillator for medical imaging and test and measurement LMK61E2-100M — 100-MHz, ±50 ppm, LVPECL ultra-low jitter standard differential oscillator LMK61E2-125M — 125-MHz, ±50 ppm, LVPECL ultra-low jitter standard differential oscillator LMK61E2-156M — 156.25-MHz, ±50 ppm, LVPECL ultra-low jitter standard differential oscillator LMK61E2-312M — 312.5-MHz, ±50 ppm, LVPECL ultra-low jitter standard differential oscillator LMK61I2-100M — 100-MHz, ±50 ppm, HCSL ultra-low jitter standard differential oscillator LMK61PD0A2 — ±50 ppm, ultra-low jitter, pin selectable, differential oscillator LMK62A2-100M — 100-MHz, LVDS ±50 ppm, high-performance, low-jitter, standard oscillator LMK62A2-150M — 150-MHz, LVDS ±50 ppm, high-performance, low-jitter, standard oscillator LMK62A2-156M — 156.25-MHz, LVDS ±50 ppm, high-performance, low-jitter oscillator LMK62A2-200M — 200-MHz, LVDS ±50 ppm, high-performance, low-jitter, standard oscillator LMK62A2-266M — 266.66-MHz, LVDS ±50 ppm, high-performance, low-jitter, standard oscillator LMK62E0-156M — 156.25-MHz, LVPECL, ±25 ppm, high-performance, low-jitter oscillator LMK62E2-100M — 100-MHz, LVPECL, ±50 ppm, high-performance, low-jitter oscillator LMK62E2-156M — 156.25-MHz, LVPECL, ±50 ppm, high-performance, low jitter, standard oscillator LMK62I0-100M — 100-MHz, HCSL, ±25 ppm, high-performance, low-jitter oscillator LMK62I0-156M — 156.25-MHz, HCSL, ±25 ppm, high-performance, low-jitter oscillator LMK6C — Low-jitter, high-performance, bulk-acoustic-wave (BAW) fixed-frequency LVCMOS oscillator LMK6D — Low-jitter, high-performance, bulk-acoustic-wave (BAW) fixed-frequency LVDS oscillator LMK6H — Low-jitter, high-performance, bulk-acoustic-wave (BAW) fixed-frequency HCSL oscillator LMK6P — Low-jitter, high-performance, bulk-acoustic-wave (BAW) fixed-frequency LVPECL oscillator
Hardware development
Evaluation board
LMK04832EVM — LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module LMX2571EPEVM — LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer LMX2594PSEVM — LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization XMICR-3P-LMX2492 — LMX2492 X-MWblock evaluation modules XMICR-3P-LMX2572 — LMX2572 X-MWblock evaluation modules XMICR-3P-LMX2592 — LMX2592 X-MWblock evaluation modules XMICR-3P-LMX2594 — LMX2594 X-MWblock evaluation modules XMICR-3P-LMX2595 — LMX2595 X-MWblock evaluation modules
Software
Support software
LMX9830-SW — LMX9830 Application Notes, Software, and Tools LMX9838-SW — LMX9838 Application Notes, Software, and Tools
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Simulation tool

PSPICE-FOR-TI — PSpice? for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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VQFN (RHD) 28 Ultra Librarian

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