PLLATINUMSIM-SW — PLLatinum Sim Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
The LMK05318B-Q1 is high-performance network synchronizer clock device that provides jitter cleaning, clock generation, advanced clock monitoring, and superior hitless switching performance to meet the stringent timing requirements of communications infrastructure and industrial applications. The ultra-low jitter and high power supply noise rejection (PSNR) of the device can reduce bit error rates (BER) in high-speed serial links.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | LMK05318B-Q1 Ultra-Low Jitter Network Synchronizer and Clock Generator With BAW VCO for Automotive and Industrial Applications datasheet | PDF | HTML | 01 Mar 2024 |
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This is an evaluation module (EVM) for the LMK05318B network synchronizer clock device.
The EVM can be used as a flexible, synchronous clock source for rapid evaluation, compliance testing, and system prototyping. SMA ports provide access to the LMK05318B clock inputs and outputs for interfacing to (...)
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RGZ) | 48 | Ultra Librarian |
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