ZHCSHH3B January 2018 – July 2018 TS5MP645
PRODUCTION DATA.
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
When the TS5MP645 is powered off (VDD = 0 V) the I/Os and digital logic pins of the device will remain in a high impedance state. The crosstalk, off-isolation, and leakage remains within the electrical specifications. This prevents errant voltages from reaching the rest of the system and maintains isolation when the system is powering up.
Figure 20 shows an example system containing a switch without powered-off protection with the following system level scenario
Figure 20. System Without Powered-Off Protection With powered-off protection, the switch prevents back powering the supply and the switch remains high-impedance. Subsystem B remains protected.
Figure 21. System With Powered-Off Protection This features has the following system level benefits.