| POWER SUPPLY |
| IDD |
Active Supply Current |
VDD = 1.65 V to 5.5 V
OE = 0 V
SEL = 0 V to 5.5 V
Dn, CLKn = 0 V |
0 |
30 |
60 |
µA |
| IDD_PD |
Power-down Supply current |
VDD = 1.65 V to 5.5 V
OE = VDD
SEL = 0 V to 5.5 V
Dn, CLKn = 0 V |
0 |
0.1 |
1 |
µA |
| IDD_PD_1.8 |
Power-down Supply current |
VDD = 1.65 V to 5.5 V
OE = 1.8 V
SEL = 0 V to 5.5 V
Dn, CLKn = 0 V |
0 |
0.1 |
10 |
µA |
| DC CHARACTERISTICS |
| RON_HS |
On-state resistance |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn,CLKn = -8 mA, 0.2V
DAn, DBn, CLKAn, CLKBn = 0.2 V, -8 mA |
|
2.45 |
5.5 |
Ω |
| RON_LP |
On-state resistance |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = -8 mA, 1.2V
DAn, DBn, CLKAn, CLKBn = 1.2 V, -8 mA |
|
2.65 |
6.5 |
Ω |
| RON_flat_HS |
On-state resistance flatness |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = -8 mA, 0 V to 0.3 V
DAn, DBn, CLKAn, CLKBn = 0 V to 0.3 V,-8 mA |
|
0.1 |
|
Ω |
| RON_flat_LP |
On-state resistance flatness |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = -8 mA, 0 V to 1.3 V
DAn, DBn, CLKAn, CLKBn = 0 V to 1.3 V, -8 mA |
|
0.9 |
|
Ω |
| ΔRON_HS |
On-state resistance match between+and - paths |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = -8 mA, 0.2 V
DAn, DBn, CLKAn, CLKBn = 0.2 V, -8 mA |
|
0.1 |
|
Ω |
| ΔRON_LP |
On-state resistance match between+and - paths |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = -8 mA, 1.2 V
DAn, DBn, CLKAn, CLKBn = 1.2 V, -8 mA |
|
0.1 |
|
Ω |
| IOFF |
Switch off leakage current |
VDD = 0 V, 1.65 V to 5.5 V
OE = 0 V to 5.5 V
SEL= 0 V to 5.5 V
Dn, CLKn = 0 V to 1.3 V
DAn, DBn, CLKAn, CLKBn = 0 V to 1.3 V |
-0.5 |
|
0.5 |
µA |
| ION |
Switch on leakage current |
VDD = 1.65 V to 5.5 V
OE = 0 V
SEL= 0 V to 5.5 V
Dn, CLKn = 0 V to 1.3 V
DAn, DBn, CLKAn, CLKBn = 0 V to 1.3 V |
-0.5 |
|
0.5 |
µA |
| DYNAMIC CHARACTERISTICS |
| tSWITCH |
Switching time between channels |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL=50 Ω, CL = 5 pF |
|
|
1.5 |
µs |
| fSEL_MAX |
Maximum toggling frequency for the SEL line |
VDD = 1.65 V to 5.5 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL= 50 Ω, CL=1 pF |
|
|
100 |
kHz |
| tON_OE |
Device enable time OE to switch on |
VDD = 1.65 V to 5.5 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL= 50 Ω, CL= 1 pF |
|
50 |
300 |
µs |
| tON_VDD |
Device enable time VDD to switch on |
VDD = 0 V to 1.65 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL= 50 Ω, CL= 1 pF |
|
50 |
300 |
µs |
| tOFF_OE |
Device disable time OE to switch off |
VDD = 1.65 V to 5.5 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL= 50 Ω, CL= 1 pF |
|
0.5 |
1 |
µs |
| tOFF_VDD |
Device disable time VDD to switch off |
VDD = 5 V to 0 V
VDD ramp rate = 250 µs
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1pF |
|
0.5 |
1 |
ms |
| tMIN_OE |
Minimum pulse width for OE |
VDD = 1.65 V to 5.5 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1 pF |
500 |
|
|
ns |
| tBBM |
Break before make time |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = RL = 50 Ω, CL = 1 pF
DAn, DBn, CLKAn, CLKBn: 0.6 V |
50 |
|
|
ns |
| tSKEW |
Intrapair skew |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = 0.3 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1 pF |
|
1 |
|
ps |
| tSKEW |
Interpair Skew |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = 0.3 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1 pF |
|
4 |
|
ps |
| tPD |
Propagation delay with 100 ps rise time |
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1 pF
tRISE = 100 ps |
|
40 |
|
ps |
| OISO |
Differential off isolation |
VDD = 1.65 V
OE = 0 V, VDD
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn: RS = 50 Ω, RL = 50 Ω, CL = 1 pF
VI/O = 200 mV + 200 mVPP (differential)
f = 1250 MHz |
|
-20 |
|
dB |
| XTALK |
Differential channel to channel crosstalk |
VDD = 1.65 V to 5.5 V
OE = 0 V, VDD
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn: RS = 50 Ω, RL = 50 Ω, CL = 1 pF
VI/O = 200 mV + 200 mVPP (differential)
f = 1250 MHz |
|
-40 |
|
dB |
| BW |
Differential Bandwidth |
VDD = 1.65 V to 5.5 V
OE = 0 V
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn: RS = 50 Ω, RL = 50 Ω, CL = 1 pF
VI/O = 200 mV + 200 mVPP (differential) |
1.5 |
2 |
|
GHz |
| ILOSS |
Insertion Loss |
VDD = 1.65 V to 5.5 V
OE = 0 V
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn: RS = 50 Ω, RL = 50 Ω, CL = 1 pF
VI/O = 200 mV + 200 mVPP (differential)
f = 100 kHz |
-0.4 |
|
|
dB |
| COFF |
Off capacitance |
VDD = 1.65 V to 5.5 V
OE = 0 V, VDD
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn = 0 V , 0.2 V
f = 1250 MHz |
|
1.5 |
|
pF |
| CON |
On capacitance |
VDD = 1.65 V to 5.5 V
OE = VDD
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn = 0 V , 0.2 V
f = 1250 MHz |
|
1.5 |
|
pF |
| DIGITAL CHARACTERISTICS |
| VIH |
Input logic high (SEL, OE) |
VI/O = 0.6 V, RL = 50 Ω, CL = 5 pF |
1.425 |
|
5.5 |
V |
| VIL |
Input logic low (SEL, OE) |
VI/O = 0.6 V, RL = 50 Ω, CL = 5 pF |
0 |
|
0.5 |
V |
| IIH |
Input high leakage current (SEL, OE) |
VI/O = 0.6 V, RL = 50 Ω, CL = 5 pF |
-5 |
|
5 |
µA |
| IIL |
Input low leakage current (SEL, OE) |
VI/O = 0.6 V, RL = 50 Ω,CL = 5 pF |
-5 |
|
5 |
µA |
| RPD |
Internal pull-down resistance on digital input pins |
VI/O = 0.6 V, RL = 50 Ω, CL = 5 pF |
|
6 |
|
MΩ |
| CSEL, COE |
Digital Input capacitance (SEL, OE) |
f = 1 MHz |
|
5 |
|
pF |