ZHCSIV8B January 2010 – October 2018 TLV320DAC3101
PRODUCTION DATA.
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| AIN1 | 13 | I | Analog input #1 routed to output mixer |
| AIN2 | 14 | I | Analog input #2 routed to output mixer |
| AVDD | 17 | – | Analog power supply |
| AVSS | 16 | – | Analog ground |
| BCLK | 7 | I/O | Audio serial bit clock |
| DIN | 5 | I | Audio serial data input |
| DVDD | 3 | – | Digital power – digital core |
| DVSS | 18 | – | Digital ground |
| GPIO1 | 32 | I/O | General-purpose input/output and multifunction pin |
| HPL | 27 | O | Left-channel headphone/line driver output |
| HPR | 30 | O | Right-channel headphone/line driver output |
| HPVDD | 28 | – | Headphone/line driver and PLL power |
| HPVSS | 29 | – | Headphone/line driver and PLL ground |
| IOVDD | 2 | – | Interface power |
| IOVSS | 1 | – | Interface ground |
| MCLK | 8 | I | External master clock |
| MICBIAS | 12 | – | Microphone bias for external microphone |
| NC | 4, 15 | I | No connecton |
| RESET | 31 | I | Device reset |
| SDL | 10 | I/O | I2C control bus clock input |
| SDA | 9 | I/O | I2C control bus data input |
| SPLM | 19 | O | Left-channel class-D speaker-driver inverting output |
| SPLP | 22 | O | Left-channel class-D speaker-driver noninverting output |
| SPLVDD | 21 | – | Left-channel class-D speaker-driver power supply |
| SPLVSS | 20 | – | Left-channel class-D speaker-driver power supply ground |
| SPRM | 23 | O | Right-channel class-D speaker-driver inverting output |
| SPRP | 26 | O | Right-channel class-D speaker-driver noninverting output |
| SPRVDD | 24 | – | Right-channel class-D speaker-driver power supply |
| SPRVSS | 25 | – | Right-channel class-D speaker-driver power-supply ground |
| VOL/MICDET | 11 | I | Volume control or headphone detection. Note that microphone detection is also available on devices that have an ADC. |
| WCLK | 6 | I/O | Audio serial word clock |