SLUSFR7 August 2025 BQ24810
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| EN_ICHG_PRESET | 3L_TIME | SEL_MORE_PRESET | EN_TURBO_FAST_TRANS | EN_CHARGE_FAST_TRANS | TURBO_SPEED | ||
| R/W | R/W | R/W | R/W | R/W | R/W | ||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| GDRV_STR_EN | AC_PLUG_EXIT_DEG | FDPDM_RISE | FPDM_FALL | ||||
| R/W | R/W | R/W | R/W | ||||
| LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
| BIT | BIT NAME | DESCRIPTION |
|---|---|---|
| [15] | EN_ICHG_PRESET | Disable SEL_MORE_PRESET bits functions and its additional FDPM
deglitch for minimizing IINDPM overshoot. 0: Disable 1: Enable (default at POR) |
| [14] | 3L_TIME | Three level adapter current limit feature time duration
adjustment for 3L unlimited input current. Not recommend to change
this on the fly when peak power mode is active. 0: 1ms (default at POR) 1: 3ms |
| [13:12] | SEL_MORE_PRESET | ICHG current regulation internal amplifier preset output value
adjustment. 00: 0mV (default at POR)(Additional 160us deglitch time for FDPM enter add on FDPM_DEG) 01: 15mV(Additional 160us deglitch time for FDPM enter add on FDPM_DEG) 10: 30mV(Additional 640us deglitch time for FDPM enter add on FDPM_DEG) 11: 40mV(Additional 640us deglitch time for FDPM enter add on FDPM_DEG) |
| [11] | EN_TURBO_FAST_TRANS | Enable the ultra fast temporary turbo boost mode entry feature.
This also activates the minimum turbo boost blank time
(BOOST_EXIT_BLK) which prevents exiting turbo boost within 320us
after FDPM_DEG. Setting to 0b decreases the minimum turbo boost time
to either 30us (if adapter current stays below 750mA) or
FDPM_FALL_DEG (if adapter current stays below FDPM_FALL but above
750mA). 0: Disable 1: Enable (default at POR) |
| [10] | EN_CHARGE_FAST_TRANS | Enable the ultra fast temporary ICHG fast recovery feature. 0: Disable 1: Enable (default at POR) |
| [9:8] | TURBO_SPEED | Turbo Boost mode startup RHP zero compensation adjustment. 00: Original speed no change (default at POR) 01: 15% speed increase 10: Reserved (similar to code 01b) 11: Reserved (similar to code 01b) |
| [7] | GDRV_STR_EN | Enable BUCK charger HS and LS gate drive strength. When enabled,
it is recommended to include an RC low pass filter on ACP/ACN to
improve IINDPM/PMON/IADP accuracy. 0: Disable 1: Enable (default at POR) |
| [6:5] | AC_PLUG_EXIT_DEG | Deglitch time from AC pluged in to charger exit battery only
boost mode. 00: 25 ms 01: 3 ms(default at POR) 10: 2 ms 11: 1 ms |
| [4:2] | Hybrid Power Boost Mode Entry Threshold (FDPM_RISE) |
Fast DPM comparator threshold to enter hybrid power boost mode.
The threshold is set as percentage to the input current limit. When
peak power is not enabled, the input current limit is ILIM1, set in
REG0x3F(). When the device is in TOVLD of peak power mode
cycle, input current limit is ILIM2, and the threshold is 107% of
ILIM2. For the rest of peak power mode cycle, input current limit is
ILIM1. 000: Reserved 001: 104% 010: 105% 011: 106% 100: 107% (default at POR) 101: 111% 110: Reserved 111: Reserved |
| [1:0] | Hybrid Power Boost Mode Exit Threshold (FDPM_FALL) |
Fast DPM comparator threshold to exit hybrid power boost mode.
00: 90% 01: 93% (default at POR) 10: 95% 11: 96% |