SLUSFR7 August 2025 BQ24810
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3
Feature Description
- 6.3.1 Device Power Up
- 6.3.2 System Power Selection
- 6.3.3 Current and Power Monitor
- 6.3.4 Processor Hot Indication for CPU Throttling
- 6.3.5 Input Current Dynamic Power Management
- 6.3.6 Two-Level Adapter Current Limit (Peak Power Mode)
- 6.3.7 EMI Switching Frequency Adjust
- 6.3.8 Device Protections Features
- 6.4 Device Functional Modes
- 6.5 Programming
- 6.6
Register Maps
- 6.6.1 Battery-Charger Commands
- 6.6.2 Setting Charger Options
- 6.6.3 ChargeOption1 Register
- 6.6.4 ChargeOption2 Register
- 6.6.5 ChargeOption3 Register
- 6.6.6 ChargeOption4 Register
- 6.6.7 ProchotOption0 Register
- 6.6.8 ProchotOption1 Register
- 6.6.9 ProchotStatus Register
- 6.6.10 Charge Current Register
- 6.6.11 Charge Voltage Register
- 6.6.12 Discharge Current Register
- 6.6.13 Minimum System Voltage Register
- 6.6.14 Input Current Register
- 6.6.15 Register Exceptions
-
7 Application and Implementation
- 7.1 Application Information
- 7.2
Typical Applications
- 7.2.1
Typical System Schematic
- 7.2.1.1 Design Requirements
- 7.2.1.2
Detailed Design Procedure
- 7.2.1.2.1 Adapter Current Sense Filter
- 7.2.1.2.2 Negative Output Voltage Protection
- 7.2.1.2.3 Reverse Input Voltage Protection
- 7.2.1.2.4 Reduce Battery Quiescent Current
- 7.2.1.2.5 CIN Capacitance
- 7.2.1.2.6 L1 Inductor Selection
- 7.2.1.2.7 CBATT Capacitance
- 7.2.1.2.8 Buck Charging Internal Compensation
- 7.2.1.2.9 CSYS Capacitance
- 7.2.1.2.10 Battery Only Boost Internal Compensation
- 7.2.1.2.11 Power MOSFETs Selection
- 7.2.1.2.12 Input Filter Design
- 7.2.1.3 Application Curves
- 7.2.2 Migration from Previous Devices (Does Not Support Battery Only Boost)
- 7.2.1
Typical System Schematic
- 7.3 Power Supply Recommendations
- 7.4 Layout
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RUY|28
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7.2.1.2.3 Reverse Input Voltage Protection
Q6, R12, and R13 in Figure 7-2 give system and IC protection from reversed adapter voltage. In normal operation, Q6 is turned off by negative Vgs. When adapter voltage is reversed, Q6 Vgs is positive. As a result, Q6 turns on to short gate and source of Q2 so that Q2 is off. Q2 body diode blocks negative voltage to system. However, CMSRC and ACDRV pins need R3 and R4 to limit the current due to the ESD diode of these pins when turned on. Q6 must have low Vgs threshold voltage and low Qgs gate charge so that it turns on before Q2. R3 and R4 must have sufficient power rating for the power dissipation when the ESD diode is on. If Q1 is replaced by Schottky diode for reverse adapter voltage protection, Q2, R3 and R4 are not needed.
Figure 7-2 Reverse
Input Voltage Protection Circuit