ZHCSFU8B May 2016 – December 2021 ADC32RF80 , ADC32RF83
PRODUCTION DATA
The first DDC (DDC0) on each ADC channel provides three different NCOs that can be used for phase-coherent frequency hopping. This feature is available in both single-band and dual-band mode, but only affects DDC0.
The NCOs can be switched through an SPI control or by using the GPIO pins with the register configurations shown in Table 8-6 for channel A (50xxh) and channel B (58xxh). The assignment of which GPIO pin to use for INSEL0 and INSEL1 is done based on Table 8-7, using registers 5438h and 5C38h. The NCO selection is done based on the logic selection on the GPIO pins; see Table 8-8 and Figure 8-42.
| REGISTER | ADDRESS | DESCRIPTION |
|---|---|---|
| NCO CONTROL THROUGH GPIO PINS | ||
| NCO SEL pin | 500Fh, 580Fh | Selects the NCO control through the SPI (default) or a GPIO pin. |
| INSEL0, INSEL1 | 5438h, 5C38h | Selects which two GPIO pins are used to control the NCO. |
| NCO CONTROL THROUGH SPI CONTROL | ||
| NCO SEL pin | 500Fh, 580Fh | Selects the NCO control through the SPI (default) or a GPIO pin. |
| NCO SEL | 5010h, 5810h | Selects which NCO to use for DDC0. |
| INSELx[1:0] (Where x = 0 or 1) | GPIO PIN SELECTED |
|---|---|
| 00 | GPIO4 |
| 01 | GPIO1 |
| 10 | GPIO3 |
| 11 | GPIO2 |
| NCO SEL[1] | NCO SEL[0] | NCO SELECTED |
|---|---|---|
| 0 | 0 | NCO1 |
| 0 | 1 | NCO2 |
| 1 | 0 | NCO3 |
| 1 | 1 | n/a |
Figure 8-42 NCO Switching from GPIO and SPI