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ZHCSHR7J May 2005 – September 2019 TS5A23166

PRODUCTION DATA.

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

YZP|8
- MXBG020L
DCU|8
- MPDS050E
YZT|8
- MXBG045G

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

訂購信息

6.5 Electrical Characteristics: 5-V Supply

V₊ = 4.5 V to 5.5 V, T_A = –40°C to 85°C (unless otherwise noted)⁽¹⁾

PARAMETER		TEST CONDITIONS		T_A	V₊	MIN	TYP	MAX	UNIT
Analog Switch
V_COM, V_NO	Analog signal					0		V₊	V
r_peak	Peak ON resistance	0 ≤ V_NO ≤ V₊, I_COM = –100 mA,	Switch ON, see Figure 11	25°C	4.5 V		0.9	1.1	Ω
r_peak	Peak ON resistance	0 ≤ V_NO ≤ V₊, I_COM = –100 mA,	Switch ON, see Figure 11	Full	4.5 V			1.2	Ω
r_on	ON-state resistance	V_NO = 2.5 V, I_COM = –100 mA,	Switch ON, see Figure 11	25°C	4.5 V		0.75	0.9	Ω
r_on	ON-state resistance	V_NO = 2.5 V, I_COM = –100 mA,	Switch ON, see Figure 11	Full	4.5 V			1	Ω
Δr_on	ON-state resistance match between channels	V_NO = 2.5 V, I_COM = –100 mA,	Switch ON, see Figure 11	25°C	4.5 V		0.04	0.1	Ω
Δr_on	ON-state resistance match between channels	V_NO = 2.5 V, I_COM = –100 mA,	Switch ON, see Figure 11	Full	4.5 V			0.1	Ω
r_on(flat)	ON-state resistance flatness	0 ≤ V_NO ≤ V₊, I_COM = –100 mA,	Switch ON, see Figure 11	25°C	4.5 V		0.2		Ω
		V_NO = 1 V, 1.5 V, 2.5 V, I_COM = –100 mA,	Switch ON, see Figure 11	25°C			0.15	0.25
		V_NO = 1 V, 1.5 V, 2.5 V, I_COM = –100 mA,	Switch ON, see Figure 11	Full				0.25
I_NO(OFF)	NO OFF leakage current	V_NO = 1 V, V_COM = 4.5 V, or V_NO = 4.5 V, V_COM = 1 V,	Switch OFF, see Figure 12	25°C	5.5 V	0 V	4	20⁽³⁾	nA
I_NO(OFF)		V_NO = 1 V, V_COM = 4.5 V, or V_NO = 4.5 V, V_COM = 1 V,	Switch OFF, see Figure 12	Full	5.5 V	–150		150	nA
I_NO(PWROFF)		V_NO = 0 to 5.5 V, V_COM = 5.5 V to 0,	Switch OFF, see Figure 12	25°C	0 V	–10	0.2	10⁽³⁾	μA
I_NO(PWROFF)		V_NO = 0 to 5.5 V, V_COM = 5.5 V to 0,	Switch OFF, see Figure 12	Full	0 V	–50		50	μA
I_COM(OFF)	COM OFF leakage current	V_COM = 1 V, V_NO = 4.5 V, or V_COM = 4.5 V, V_NO = 1 V,	Switch OFF, see Figure 12	25°C	5.5 V	0 V	4	20⁽³⁾	nA
I_COM(OFF)		V_COM = 1 V, V_NO = 4.5 V, or V_COM = 4.5 V, V_NO = 1 V,	Switch OFF, see Figure 12	Full	5.5 V	–150		150	nA
I_COM(PWROFF)		V_COM = 0 to 5.5 V, V_NO = 5.5 V to 0,	Switch OFF, see Figure 12	25°C	0 V	–10	0.2	10⁽³⁾	μA
I_COM(PWROFF)		V_COM = 0 to 5.5 V, V_NO = 5.5 V to 0,	Switch OFF, see Figure 12	Full	0 V	–50		50	μA
I_NO(ON)	NO ON leakage current	V_NO = 1 V, V_COM = Open, or V_NO = 4.5 V, V_COM = Open,	Switch ON, see Figure 13	25°C	5.5 V	–5	0.4	5⁽³⁾	nA
I_NO(ON)	NO ON leakage current	V_NO = 1 V, V_COM = Open, or V_NO = 4.5 V, V_COM = Open,	Switch ON, see Figure 13	Full	5.5 V	–50		50	nA
I_COM(ON)	COM ON leakage current	V_COM = 1 V, V_NO = Open, or V_COM = 4.5 V, V_NO = Open,	Switch ON, see Figure 13	25°C	5.5 V	–5	0.4	5⁽³⁾	nA
I_COM(ON)	COM ON leakage current	V_COM = 1 V, V_NO = Open, or V_COM = 4.5 V, V_NO = Open,	Switch ON, see Figure 13	Full	5.5 V	–50		50	nA
Digital Control Inputs (IN1, IN2)⁽²⁾
V_IH	Input logic high			Full		2.4		5.5	V
V_IL	Input logic low			Full		0		0.8	V
I_IH, I_IL	Input leakage current	V_I = 5.5 V or 0		25°C	5.5 V	–2	0.3	2	nA
I_IH, I_IL	Input leakage current	V_I = 5.5 V or 0		Full	5.5 V	–20		20	nA
Dynamic
Q_C	Charge injection	V_GEN = 0, R_GEN = 0,	C_L = 1 nF, see Figure 19	25°C	5 V		6		pC
C_NO(OFF)	NO OFF capacitance	V_NO = V₊ or GND, Switch OFF,	See Figure 14	25°C	5 V		19		pF
C_COM(OFF)	COM OFF capacitance	V_COM = V₊ or GND, Switch OFF,	See Figure 14	25°C	5 V		18		pF
C_NO(ON)	NO ON capacitance	V_NO = V₊ or GND, Switch ON,	See Figure 14	25°C	5 V		35.5		pF
C_COM(ON)	COM ON capacitance	V_COM = V₊ or GND, Switch ON,	See Figure 14	25°C	5 V		35.5		pF
C_I	Digital input capacitance	V_I = V₊ or GND,	See Figure 14	25°C	5 V		2		pF
BW	Bandwidth	R_L = 50 Ω, Switch ON,	See Figure 16	25°C	5 V		150		MHz
O_ISO	OFF isolation	R_L = 50 Ω, f = 1 MHz,	Switch OFF, see Figure 17	25°C	5 V		–62		dB
X_TALK	Crosstalk	R_L = 50 Ω, f = 1 MHz,	Switch ON, see Figure 18	25°C	5 V		–85		dB
THD	Total harmonic distortion	R_L = 600 Ω, C_L = 50 pF,	f = 20 Hz to 20 kHz, see Figure 20	25°C	5 V		0.005%
Supply
I₊	Positive supply current	V_I = V₊ or GND,	Switch ON or OFF	25°C	5.5 V		0.01	0.1	μA
I₊	Positive supply current	V_I = V₊ or GND,	Switch ON or OFF	Full				1	μA

(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.

(2) All unused digital inputs of the device must be held at V₊ or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

(3) Not tested in production.