ZHCSOS1 March 2022 TPS629210E
PRODUCTION DATA
Figure 6-1 TPS629210E 8-Pin DRL SOT-5X3 Pinout| Pin | I/O | Description | |
|---|---|---|---|
| Name | NO. | ||
| FB/VSET | 1 | I | Dependent upon device
configuration (see Section 8.3.1)
|
| PG | 2 | O | Open-drain power-good output |
| VOS | 3 | I | Output voltage sense pin. Connect directly to the positive pin of the output capacitor. |
| SW | 4 | Switch pin of the converter. Connected to the internal power switches | |
| GND | 5 | Ground pin | |
| VIN | 6 | I | Power supply input. Make sure the input capacitor is connected as close as possible between the VIN pin and GND. |
| EN | 7 | I | Enable/disable pin including a threshold comparator. Connect to logic low to disable the device. Pull high to enable the device. Do not leave this pin unconnected. |
| MODE/S-CONF | 8 | I | Device mode selection (auto PFM/PWM or forced PWM operation) and Smart-CONFIG pin. Connect a resistor to configure the device according to Table 8-1. |