ZHCSP87A December   2022  – September 2023 TPS25772-Q1

PRODUCTION DATA  

1.   1
2. 1 特性
3. 2 應(yīng)用
4. 3 說(shuō)明
5. 4 Revision History
6. 5 Device Comparison Table
7. 6 Pin Configuration and Functions
8. 7 Specifications
   1. 7.1  Absolute Maximum Ratings
   2. 7.2  ESD Ratings
   3. 7.3  Recommended Operating Conditions
   4. 7.4  Recommended Components
   5. 7.5  Thermal Information
   6. 7.6  Buck-Boost Regulator
   7. 7.7  CC Cable Detection Parameters
   8. 7.8  CC VCONN Parameters
   9. 7.9  CC PHY Parameters
   10. 7.10 Thermal Shutdown Characteristics
   11. 7.11 Oscillator Characteristics
   12. 7.12 ADC Characteristics
   13. 7.13 TVS Parameters
   14. 7.14 Input/Output (I/O) Characteristics
   15. 7.15 BC1.2 Characteristics
   16. 7.16 I2C Requirements and Characteristics
   17. 7.17 Typical Characteristics
9. 8 Parameter Measurement Information
10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
       1. 9.3.1  Device Power Management and Supervisory Circuitry
          1. 9.3.1.1 VIN UVLO and Enable/UVLO
          2. 9.3.1.2 Internal LDO Regulators
       2. 9.3.2  TVSP Device Configuration and ESD Protection
       3. 9.3.3  Buck-Boost Regulator
          1. 9.3.3.1  Buck-Boost Regulator Operation
          2. 9.3.3.2  Switching Frequency, Frequency Dither, Phase-Shift and Synchronization
          3. 9.3.3.3  VIN Supply and VIN Over-Voltage Protection
          4. 9.3.3.4  Feedback Paths and Error Amplifiers
          5. 9.3.3.5  Transconductors and Compensation
          6. 9.3.3.6  Output Voltage DAC, Soft-Start and Cable Droop Compensation
          7. 9.3.3.7  VBUS Overvoltage Protection
          8. 9.3.3.8  VBUS Undervoltage Protection
          9. 9.3.3.9  Current Sense Resistor (RSNS) and Current Limit Operation
          10. 9.3.3.10 Buck-Boost Peak Current Limits
       4. 9.3.4  USB-PD Physical Layer
          1. 9.3.4.1 USB-PD Encoding and Signaling
          2. 9.3.4.2 USB-PD Bi-Phase Marked Coding
          3. 9.3.4.3 USB-PD Transmit (TX) and Receive (Rx) Masks
          4. 9.3.4.4 USB-PD BMC Transmitter
          5. 9.3.4.5 USB-PD BMC Receiver
          6. 9.3.4.6 Squelch Receiver
       5. 9.3.5  VCONN
       6. 9.3.6  Cable Plug and Orientation Detection
          1. 9.3.6.1 Configured as a Source
          2. 9.3.6.2 Configured as a Sink
          3. 9.3.6.3 Overvoltage Protection (Px_CC1, Px_CC2)
       7. 9.3.7  ADC
          1. 9.3.7.1 ADC Divider Ratios
       8. 9.3.8  BC 1.2, Legacy and Fast Charging Modes (Px_DP, Px_DM)
       9. 9.3.9  USB2.0 Low-Speed Endpoint
       10. 9.3.10 Digital Interfaces
           1. 9.3.10.1 General GPIO
           2. 9.3.10.2 I2C Buffer
       11. 9.3.11 I2C Interface
           1. 9.3.11.1 I2C Interface Description
           2. 9.3.11.2 I2C Clock Stretching
           3. 9.3.11.3 I2C Address Setting
           4. 9.3.11.4 Unique Address Interface
           5. 9.3.11.5 I2C Pullup Resistor Calculation
       12. 9.3.12 Digital Core
           1. 9.3.12.1 Device Memory
           2. 9.3.12.2 Core Microprocessor
       13. 9.3.13 NTC Input
       14. 9.3.14 Thermal Sensors and Thermal Shutdown
    4. 9.4 Device Functional Modes
11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
       1. 10.2.1 Design Requirements
       2. 10.2.2 Detailed Design Procedure
          1. 10.2.2.1 Application GUI Selections
          2. 10.2.2.2 EEPROM Selection
          3. 10.2.2.3 EN/UVLO
          4. 10.2.2.4 Sense Resistor, RSNS, RCSP, RCSN and CFILT
          5. 10.2.2.5 Inductor Currents
          6. 10.2.2.6 Output Capacitor
          7. 10.2.2.7 Input Capacitor
       3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
       1. 10.4.1 Layout Guidelines
       2. 10.4.2 Layout Example
12. 11Device and Documentation Support
    1. 11.1 Documentation Support
       1. 11.1.1 Related Documentation
    2. 11.2 接收文檔更新通知
    3. 11.3 支持資源
    4. 11.4 Trademarks
    5. 11.5 靜電放電警告
    6. 11.6 術(shù)語(yǔ)表
13. 12Mechanical, Packaging, and Orderable Information