The PWM oscillator frequency (f_sw) is programmed by firmware using the application configuration GUI. The switching converter is intended for operation below the AM radio band (520 kHz - 1730 kHz). Three nominal f_sw settings below are available: 300 kHz, 400 kHz and 450 kHz.

Frequency dithering can be enabled by firmware via the application GUI. When enabled, the nominal oscillator frequency is dithered by ±FS_SS (approximately ±10%) using triangular waveform modulation (see Dithering using triangular waveform modulation). The dither period τ_M is the reciprocal of the dither modulation frequency FS_{SS_MOD}. Two firmware selectable dither modulation frequencies FS_{SS_M} are available: 10 and 25 kHz. Dithering spreads the spectral peaks generated by switching, thereby reducing the peak harmonic levels and easing EMI filter design.

Figure 9-13 Dithering Using Triangular Waveform Modulation

Multiple converters can be synchronized using the SYNC pin. This pin can be firmware-configured as either an output SYNC(o) or an input SYNC(i).

• SYNC(o): The switching clock is placed on the SYNC(o) pin. This waveform will have a duty cycle of approximately 50%. If frequency dithering is configured by firmware, this signal will also exhibit dithering. Four phase settings are available by firmware configuration to shift the SYNC(o) output relative to the internal switching clock by 0°, 90°, 120°, or 180°. SYNC(o) is used to slave other DC/DC converter clocks to the switching converter clock inside the TPS25772-Q1. When two dc/dc converters operate out of phase, peak input current from the battery is reduced and total input bulk capacitance requirements decrease.
  Figure 9-14 SYNC(o) Phase Shift
  Figure 9-15 Using SYNC(o) to slave DC/DC Converter
• SYNC(i): The internal clock is synchronized to the pulse train on the SYNC(i) pin. This feature is used to slave the TPS25772-Q1 to an external clock. The period of this clock must meet synchronization requirements in SYNC(i) frequency ranges or the TPS25772-Q1 will instead use its internal switching clock. If an external clock deviates outside of the acceptable frequency range and then returns to within the acceptable frequency range, the TPS25772-Q1 will resume operation from the external clock after counting 8 consecutive clocks meeting the criteria of Table 9-6. When SYNC(i) is configured, frequency dithering is disabled when operating from the internal clock following a failure of the external clock.