ZHCSLQ0B August 2020 – November 2023 TCA4307
PRODUCTION DATA
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| fSCL_MAX | Maximum SCL clock frequency | 400 | kHz | ||
| tBUF(1) | Bus free time between a STOP and START condition | 1.3 | μs | ||
| tHD;STA(1) | Hold time for a repeated START condition | 0.6 | μs | ||
| tSU;STA(1) | Set-up time for a repeated START condition | 0.6 | μs | ||
| tSU;STO(1) | Set-up time for a STOP condition | 0.6 | μs | ||
| tHD;DAT(1) | Data hold time | 0 | ns | ||
| tSU;DAT(1) | Data set-up time | 100 | ns | ||
| tLOW(1) | LOW period of the SCL clock | 1.3 | μs | ||
| tHIGH(1) | HIGH period of the SCL clock | 0.6 | μs | ||
| tf(1) | Fall time of both SDA and SCL signals | 20 × (VCC/5.5 V) | 300 | ns | |
| tr(1) | Rise time of both SDA and SCL signals | 20 × (VCC/5.5 V) | 300 | ns | |