SLLS516E August 2002 – July 2015 SN65LVDS100 , SN65LVDS101 , SN65LVDT100 , SN65LVDT101
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Description (Continued)
- 6 Device Options
- 7 Pin Configuration and Functions
- 8 Specifications
- 9 Parameter Measurement Information
- 10Detailed Description
-
11Application and Implementation
- 11.1 Application Information
- 11.2
Typical Application
- 11.2.1 PECL to LVDS Translation
- 11.2.2 LVDS to 3.3-V PECL Translation
- 11.2.3 5-V PECL to 3.3-V PECL Translation
- 11.2.4 CML to LVDS or 3.3-V PECL Translation
- 11.2.5 Single-Ended 3.3-V PECL to LVDS Translation
- 11.2.6 Single-Ended CMOS to LVDS Translation
- 11.2.7 Single-Ended CMOS to 3.3-V PECL Translation
- 11.2.8 Receipt of AC-Coupled Signals
- 12Power Supply Recommendations
- 13Layout
- 14Device and Documentation Support
- 15Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- D|8
- DGK|8
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7 Pin Configuration and Functions
Pin Functions
| PIN | I/O | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | SN65LVDS100, SN65LVDS101 | SN65LVDT100, SN65LVDT101 | ||
| A | 2 | 2 | I | Differential non-inverting input |
| B | 3 | 3 | I | Differential inverting input |
| GND | 5 | 5 | — | Ground |
| NC | 1 | 1, 4 | — | No connect |
| VBB | 4 | — | O | Voltage reference |
| VCC | 8 | 8 | — | Supply voltage |
| Y | 7 | 7 | O | Differential non-inverting output |
| Z | 6 | 6 | O | Differential inverting output |