SLES248A May 2009 – March 2015 PCM1795
PRODUCTION DATA.
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage | VCC1, VCC2L, VCC2R | –0.3 | 6.5 | V |
| VDD | –0.3 | 4 | V | |
| Supply voltage differences | VCC1, VCC2L, VCC2R | –0.1 | 0.1 | V |
| Ground voltage differences | AGND1, AGND2, AGND3L, AGND3R, DGND | –0.1 | 0.1 | V |
| Digital input voltage | LRCK, DATA, BCK, SCK, MSEL, RST, MS(2), MDI, MC, MDO(2), ZEROL(2), ZEROR(2) | –0.3 | 6.5 | V |
| ZEROL(3), ZEROR(3), MDO(3), MS(3) | –0.3 | (VDD + 0.3) < 4 | V | |
| Analog input voltage | –0.3 | (VCC + 0.3) < 6.5 | V | |
| Input current (any pins except supplies) | –10 | 10 | mA | |
| Ambient temperature under bias | –40 | 125 | °C | |
| Junction temperature | 150 | °C | ||
| Package temperature (IR reflow, peak) | 260 | °C | ||
| Storage temperature, Tstg | –55 | 150 | °C | |
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±3000 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1500 | |||
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| VDD Digital supply voltage | 3.0 | 3.3 | 3.6 | V | |
| VCC1 | Analog Supply Voltage | 4.7525 | 5 | 5.25 | V |
| VCC2L | |||||
| VCC2R | |||||
| Operating Temperature | –25 | 85 | °C | ||
| THERMAL METRIC(1) | PCM1795 | UNIT | |
|---|---|---|---|
| DB (SSOP) | |||
| 28 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 70.3 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 28.3 | |
| RθJB | Junction-to-board thermal resistance | 31.5 | |
| ψJT | Junction-to-top characterization parameter | 2.9 | |
| ψJB | Junction-to-board characterization parameter | 31.1 | |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | — | |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| RESOLUTION | ||||||
| Resolution | 32 | Bits | ||||
| DATA FORMAT (PCM Mode) | ||||||
| Audio data interface format | Standard, I2S, left-justified | |||||
| Audio data bit length | 16-, 24-, 32-bit selectable | |||||
| Audio data format | MSB first, twos complement | |||||
| fS | Sampling frequency | 10 | 200 | kHz | ||
| System clock frequency | 128, 192, 256, 384, 512, 768 | fS | ||||
| DATA FORMAT (DSD Mode) | ||||||
| Audio data interface format | DSD (direct stream digital) | |||||
| Audio data bit length | 1 | Bit | ||||
| fS | Sampling frequency | 2.8224 | MHz | |||
| System clock frequency | 2.8224 | 11.2986 | MHz | |||
| DIGITAL INPUT/OUTPUT | ||||||
| Logic family | TTL compatible | |||||
| VIH | Input logic level | 2 | VDC | |||
| VIL | 0.8 | VDC | ||||
| IIH | Input logic current | VIN = VDD | 10 | μA | ||
| IIL | VIN = 0 V | –10 | μA | |||
| VOH | Output logic level | IOH = –2 mA | 2.4 | VDC | ||
| VOL | IOL = 2 mA | 0.4 | VDC | |||
| DYNAMIC PERFORMANCE (PCM MODE)(1)(2) | ||||||
| THD+N at VOUT = 0 dB | fS = 48 kHz | 0.0005% | 0.001% | |||
| fS = 96 kHz | 0.001% | |||||
| fS = 192 kHz | 0.0015% | |||||
| Dynamic range | EIAJ, A-weighted, fS = 48 kHz | 120 | 123 | dB | ||
| EIAJ, A-weighted, fS = 96 kHz | 123 | |||||
| EIAJ, A-weighted, fS = 192 kHz | 123 | |||||
| Signal-to-noise ratio | EIAJ, A-weighted, fS = 48 kHz | 120 | 123 | dB | ||
| EIAJ, A-weighted, fS = 96 kHz | 123 | |||||
| EIAJ, A-weighted, fS = 192 kHz | 123 | |||||
| Channel separation | fS = 48 kHz | 116 | 119 | dB | ||
| fS = 96 kHz | 118 | |||||
| fS = 192 kHz | 117 | |||||
| Level linearity error | VOUT = –120 dB | ±1 | dB | |||
| DYNAMIC PERFORMANCE (MONO MODE)(1)(2)(3) | ||||||
| THD+N at VOUT = 0 dB | fS = 48 kHz | 0.0005% | ||||
| fS = 96 kHz | 0.001% | |||||
| fS = 192 kHz | 0.0015% | |||||
| Dynamic range | EIAJ, A-weighted, fS = 48 kHz | 126 | dB | |||
| EIAJ, A-weighted, fS = 96 kHz | 126 | |||||
| EIAJ, A-weighted, fS = 192 kHz | 126 | |||||
| Signal-to-noise ratio | EIAJ, A-weighted, fS = 48 kHz | 126 | dB | |||
| EIAJ, A-weighted, fS = 96 kHz | 126 | |||||
| EIAJ, A-weighted, fS = 192 kHz | 126 | |||||
| DSD MODE DYNAMIC PERFORMANCE (44.1 kHz, 64 fS)(1)(4) | ||||||
| THD+N at FS | 2 V rms | 0.0007% | ||||
| Dynamic range | –60 dB, EIAJ, A-weighted | 122 | dB | |||
| Signal-to-noise ratio | EIAJ, A-weighted | 122 | dB | |||
| ANALOG OUTPUT | ||||||
| Gain error | –7 | ±2 | 7 | % of FSR | ||
| Gain mismatch, channel-to-channel | –3 | ±0.5 | 3 | % of FSR | ||
| Bipolar zero error | At BPZ | –2 | ±0.5 | 2 | % of FSR | |
| Output current | Full-scale (0 dB) | 4 | mAPP | |||
| Center current | At BPZ | –3.5 | mA | |||
| DIGITAL FILTER PERFORMANCE | ||||||
| De-emphasis error | ±0.1 | dB | ||||
| FILTER CHARACTERISTICS–1: SHARP ROLL-OFF | ||||||
| Passband | ±0.0002 dB | 0.454 | fS | |||
| –3 dB | 0.49 | |||||
| Stop band | 0.546 | fS | ||||
| Passband ripple | ±0.0002 | dB | ||||
| Stop-band attenuation | Stop band = 0.546 fS | –98 | dB | |||
| Delay time | 38/fS | s | ||||
| FILTER CHARACTERISTICS–2: SLOW ROLL-OFF | ||||||
| Passband | ±0.001 dB | 0.21 | fS | |||
| –3 dB | 0.448 | |||||
| Stop band | 0.79 | fS | ||||
| Passband ripple | ±0.001 | dB | ||||
| Stop-band attenuation | Stop band = 0.732 fS | –80 | dB | |||
| Delay time | 38/fS | s | ||||
| POWER-SUPPLY REQUIREMENTS | ||||||
| VDD | Voltage range | 3 | 3.3 | 3.6 | VDC | |
| VCC1 | 4.75 | 5 | 5.25 | VDC | ||
| VCC2L | ||||||
| VCC2R | ||||||
| IDD | Supply current(5) | fS = 48 kHz | 6 | 8 | mA | |
| fS = 96 kHz | 11 | |||||
| fS = 192 kHz | 21 | |||||
| ICC | fS = 44.1 kHz | 18 | 23 | |||
| fS = 96 kHz | 19 | |||||
| fS = 192 kHz | 20 | |||||
| Power dissipation(5) | fS = 48 kHz | 110 | 141 | mW | ||
| fS = 96 kHz | 131 | |||||
| fS = 192 kHz | 166 | |||||
| TEMPERATURE RANGE | ||||||
| Operating temperature | –25 | +85 | °C | |||
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| f(SCL) | SCL clock frequency | Standard | 100 | kHz | |
| Fast | 400 | ||||
| t(BUF) | Bus free time between stop and start conditions | Standard | 4.7 | μs | |
| Fast | 1.3 | ||||
| t(LOW) | Low period of the SCL clock | Standard | 4.7 | μs | |
| Fast | 1.3 | ||||
| t(HI) | High period of the SCL clock | Standard | 4 | μs | |
| Fast | 600 | ns | |||
| t(RS-SU) | Setup time for (repeated) start condition | Standard | 4.7 | μs | |
| Fast | 600 | ns | |||
| t(S-HD) | Hold time for (repeated) start condition | Standard | 4 | μs | |
| t(RS-HD) | Fast | 600 | ns | ||
| t(D-SU) | Data setup time | Standard | 250 | ns | |
| Fast | 100 | ||||
| t(D-HD) | Data hold time | Standard | 0 | 900 | ns |
| Fast | 0 | 900 | |||
| t(SCL-R) | Rise time of SCL signal | Standard | 20 + 0.1 CB | 1000 | ns |
| Fast | 20 + 0.1 CB | 300 | |||
| t(SCL-R1) | Rise time of SCL signal after a repeated start condition and after an acknowledge bit | Standard | 20 + 0.1 CB | 1000 | ns |
| Fast | 20 + 0.1 CB | 300 | |||
| t(SCL-F) | Fall time of SCL signal | Standard | 20 + 0.1 CB | 1000 | ns |
| Fast | 20 + 0.1 CB | 300 | |||
| t(SDA-R) | Rise time of SDA signal | Standard | 20 + 0.1 CB | 1000 | ns |
| Fast | 20 + 0.1 CB | 300 | |||
| t(SDA-F) | Fall time of SDA signal | Standard | 20 + 0.1 CB | 1000 | ns |
| Fast | 20 + 0.1 CB | 300 | |||
| t(P-SU) | Setup time for stop condition | Standard | 4 | μs | |
| Fast | 600 | ns | |||
| C(B) | Capacitive load for SDA and SCL line | 400 | pF | ||
| t(SP) | Pulse duration of suppressed spike | Fast | 50 | ns | |
| VNH | Noise margin at high level for each connected device (including hysteresis) | 0.2 VDD | V | ||
Figure 1. Timing Definition on the I2C Bus
Figure 2. Amplitude vs Frequency
Figure 4. Amplitude vs Frequency
Figure 3. Amplitude vs Frequency
Figure 5. Amplitude vs Frequency
Figure 6. De-Emphasis Level vs Frequency
Figure 8. De-Emphasis Level vs Frequency
Figure 10. De-Emphasis Level vs Frequency
Figure 7. De-Emphasis Error vs Frequency
Figure 9. De-Emphasis Error vs Frequency
Figure 11. De-Emphasis Error vs Frequency
PCM mode, TA = +25°C, and VDD = 3.3 V; measured with circuit shown in Figure 53, unless otherwise noted.
Figure 12. THD+N vs Supply Voltage
Figure 14. SNR vs Supply Voltage
Figure 13. Dynamic Range vs Supply Voltage
Figure 15. Channel Separation vs Supply Voltage
PCM mode, VDD = 3.3 V, and VCC = 5 V; measured with circuit shown in Figure 53, unless otherwise noted.
Figure 16. THD+N vs Free-Air Temperature
Figure 18. SNR vs Free-Air Temperature
Figure 20. Amplitude vs Frequency
Figure 22. Amplitude vs Frequency
Figure 24. THD+N vs Input Level
Figure 17. Dynamic Range vs Free-Air Temperature
Figure 19. Channel Separation vs Free-Air Temperature
Figure 21. Amplitude vs Frequency
Figure 23. Amplitude vs Frequency
Figure 25. Amplitude vs FrequencyAll specifications at DBCK = 2.8224 MHz (44.1 kHz × 64 fS), and 50% modulation DSD data input, unless otherwise noted.
Figure 26. Gain vs Frequency
Figure 28. Gain vs Frequency
Figure 30. Gain vs Frequency
Figure 32. Gain vs Frequency