ZHCSIO3I January 2005 – August 2024 PCF8575
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Pin Configuration and Functions
- 5 Specifications
- 6 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RGE|24
訂購信息
4 Pin Configuration and Functions
Figure 4-1 DB, DBQ, DGV, DW, or PW Package SSOP, TVSOP, SOIC, TSSOP
(Top View)
(Top View)
Figure 4-2 RGE Package VQFN(Top View)
| PIN | TYPE | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | DB, DBQ, DGV, DW, AND PW | RGE | ||
| A0 | 21 | 18 | I | Address input 0. Connect directly to VCC or ground. Pull-up resistors are not needed. |
| A1 | 2 | 23 | I | Address input 1. Connect directly to VCC or ground. Pull-up resistors are not needed. |
| A2 | 3 | 24 | I | Address input 2. Connect directly to VCC or ground. Pull-up resistors are not needed. |
| INT | 1 | 22 | O | Interrupt output. Connect to VCC through a pull-up resistor. |
| P00 | 4 | 1 | I/O | P-port input/output. Push-pull design structure. |
| P01 | 5 | 2 | I/O | P-port input/output. Push-pull design structure. |
| P02 | 6 | 3 | I/O | P-port input/output. Push-pull design structure. |
| P03 | 7 | 4 | I/O | P-port input/output. Push-pull design structure. |
| P04 | 8 | 5 | I/O | P-port input/output. Push-pull design structure. |
| P05 | 9 | 6 | I/O | P-port input/output. Push-pull design structure. |
| P06 | 10 | 7 | I/O | P-port input/output. Push-pull design structure. |
| P07 | 11 | 8 | I/O | P-port input/output. Push-pull design structure. |
| GND | 12 | 9 | — | Ground |
| P10 | 13 | 10 | I/O | P-port input/output. Push-pull design structure. |
| P11 | 14 | 11 | I/O | P-port input/output. Push-pull design structure. |
| P12 | 15 | 12 | I/O | P-port input/output. Push-pull design structure. |
| P13 | 16 | 13 | I/O | P-port input/output. Push-pull design structure. |
| P14 | 17 | 14 | I/O | P-port input/output. Push-pull design structure. |
| P15 | 18 | 15 | I/O | P-port input/output. Push-pull design structure. |
| P16 | 19 | 16 | I/O | P-port input/output. Push-pull design structure. |
| P17 | 20 | 17 | I/O | P-port input/output. Push-pull design structure. |
| SCL | 22 | 19 | I | Serial clock line. Connect to VCC through a pull-up resistor |
| SDA | 23 | 20 | I/O | Serial data line. Connect to VCC through a pull-up resistor. |
| VCC | 24 | 21 | — | Supply voltage |