The device is designed to be used with a wide variety of LC filters. Minimize the output capacitance to keep cost and size down. The output capacitor or capacitors, C_OUT, must be chosen with care because the capacitors directly affects the steady state output voltage ripple, loop stability, and output voltage overshoot and undershoot during load current transient. The output voltage ripple is essentially composed of two parts. One part is caused by the inductor ripple current flowing through the Equivalent Series Resistance (ESR) of the output capacitors:

The other part is caused by the inductor current ripple charging and discharging the output capacitors:

The two components of the voltage ripple are not in-phase, therefore, the actual peak-to-peak ripple is less than the sum of the two peaks.

The output capacitance value is limited by the load transient specifications of the system. When a large load step occurs, output capacitors provide the required charge before the inductor current can slew to an appropriate level. The control loop of the converter usually requires eight or more clock cycles to regulate the inductor current equal to the new load level during this time. The output capacitance must be large enough to supply the current difference for eight clock cycles to maintain the output voltage within the specified range. Equation 12 shows the minimum output capacitance needed for a specified V_OUT overshoot and undershoot.

where

• K_IND = Ripple ratio of the inductor current (Δi_L / I_OUT)
• I_OL = Low level output current during load transient
• I_OH = High level output current during load transient
• V_{OUT_SHOOT} = Target output voltage overshoot or undershoot

For this design example, the target output ripple is 25mV. Assuming ΔV_{OUT_ESR} = ΔV_{OUT_C} = 15mV, choose K_IND = 0.35. Equation 10 yields ESR no larger than 43m? and Equation 11 yields C_OUT no smaller than 10.94μF. For the target overshoot and undershoot limitation of this design, ΔV_{OUT_SHOOT} = 5% × V_OUT = 250mV. The C_OUT can be calculated to be no less than 20μF by Equation 12. In summary, the most stringent criteria for the output capacitor is 20μF. Considering derating, one 22μF, 16V, X7R ceramic capacitor with 10m? ESR is used.