ZHCSKT0J November 1998 – August 2024 CD4066B
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Figure 4-1 N, J, D, NS, or PW Packages
14-Pin PDIP, CDIP, SOIC, SOP, or TSSOP (Top View)| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| SIG A IN/OUT | 1 | I/O | Input/Output for Switch A |
| SIG A OUT/IN | 2 | I/O | Output/Input for Switch A |
| SIG B OUT/IN | 3 | I/O | Output/Input for Switch B |
| SIG B IN/OUT | 4 | I/O | Input/Output for Switch B |
| CONTROL B | 5 | I | Control pin for Switch B |
| CONTROL C | 6 | I | Control pin for Switch C |
| VSS | 7 | — | Low Voltage Power Pin |
| SIG C IN/OUT | 8 | I/O | Input/Output for Switch C |
| SIG C OUT/IN | 9 | I/O | Output/Input for Switch C |
| SIG D OUT/IN | 10 | I/O | Output/Input for Switch D |
| SIG D IN/OUT | 11 | I/O | Input/Output for Switch D |
| CONTROL D | 12 | I | Control Pin for D |
| CONTROL A | 13 | I | Control Pin for A |
| VDD | 14 | — | Power Pin |