SBASAR8 November 2025 AMC0300D-Q1
PRODMIX
Many systems use ADCs with single-ended inputs that cannot connect directly to the differential output of the AMC0x00D-Q1. Figure 8-3 shows a circuit for converting the differential output signal into a single-ended signal in front of the ADC. For R1 = R3 and R2 = R4, the output voltage equals (R2 / R1) × (VOUTP – VOUTN) + VREF. For C1 = C2 the bandwidth of the filter becomes 1 / (2 × π × C1 × R1). Configure the bandwidth of the filter to match the bandwidth requirement of the system. For best linearity, use capacitors with low voltage coefficients (such as NP0-type capacitors). For most applications, R1 = R2 = R3 = R4 = 3.3kΩ and C1 = C2 = 330pF yield good performance.
The following reference guides provide further information on the general procedure to design the filtering and driving stages of SAR ADCs. These reference guides are available for download at www.ti.com.