ZHCSPO2 September 2023 ADC32RF52
PRODUCTION DATA
The following section outlines the sequence of register writes for the device configuration after initial power up.
| Step | Section | Description |
|---|---|---|
| 1 | RESET | Hardware and software RESET to reset all registers to known state |
| 2 | DEVICE CONFIG | Configures the digital operating modes like averaging, test pattern output, input termination, internal dither and decimation. |
| 3 | JESD | Configures the JESD204B interface |
| 4 | SYSREF | Enables SYSREF input and resets internal circuits based on external SYSREF signal. |
| 5 | JESD | Clears and configures some of the JESD registers |
| 6 | TRIM | Set trim settings for best analog performance |
| 7 | CALIB CONFIG | Configure the calibration settings |
| 8 | SYSREF | Issue SYSREF for trim settings to go into effect |
| 9 | RUN CALIB | Run power up calibration |
| 10 | JESD | Synchronize the JESD interface with the receiver |
The following section outlines the detailed register writes for the device configuration after initial power up. This includes all the register writes (fields in grey) which are not documented in the register summary table. The register examples are given for 2x internal averaging, DDC bypass mode (LMFS = 8224).