主頁 接口 HDMI、DisplayPort 和 MIPI IC

TVP70025I

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具有水平 PLL 的三通道 10 位 90MSPS 視頻和圖形數(shù)字轉(zhuǎn)換器

產(chǎn)品詳情

Type HDMI Companion Rating Catalog Operating temperature range (°C) -40 to 85
Type HDMI Companion Rating Catalog Operating temperature range (°C) -40 to 85
HTQFP (PZP) 100 256 mm2 16 x 16
  • Analog Channels
    • –6-dB to 6-dB Analog Gain
    • Analog Input Multiplexers (MUXs)
    • Automatic Video Clamp
    • Three Digitizing Channels, Each With Independently Controllable Clamp, Gain, Offset, and Analog-to-Digital Converter (ADC)
    • Clamping: Selectable Clamping Between Bottom Level and Mid Level
    • Offset: 1024-Step Programmable RGB or YPbPr Offset Control
    • Gain: 8-Bit Programmable Gain Control
    • ADC: 10-Bit 90-MSPS A/D Converter
    • Automatic Level Control (ALC) Circuit
    • Composite Sync: Integrated Sync-on-Green Extraction From Green/Luminance Channel
    • Support for DC- and AC-Coupled Input Signals
    • Programmable Video Bandwidth Control
    • Supports Component Video Standards 480i, 576i, 480p, 576p, 720p, and 1080i
    • Supports PC Graphics Inputs up to 90 MSPS
    • Programmable RGB-to-YCbCr Color Space Conversion
  • Horizontal Phase-Locked Loop (PLL)
    • Fully Integrated Horizontal PLL for Pixel Clock Generation
    • 9-MHz to 90-MHz Pixel Clock Generation From HSYNC Input
    • Adjustable Horizontal PLL Loop Bandwidth for Minimum Jitter
    • 5-Bit Programmable Subpixel Accurate Positioning of Sampling Phase
  • Output Formatter
    • Supports 20-bit 4:2:2 Outputs With Embedded Syncs
    • Support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2 Output Modes to Reduce Board Traces
    • Dedicated DATACLK Output With Programmable Output Polarity for Easy Latching of Output Data
  • System
    • Industry-Standard Normal/Fast I2C Interface With Register Readback Capability
    • Space-Saving 100-Pin TQFP Package
    • Thermally-Enhanced PowerPAD Package for Better Heat Dissipation
    • Industrial Temperature Range –40°C to 85°C
  • Analog Channels
    • –6-dB to 6-dB Analog Gain
    • Analog Input Multiplexers (MUXs)
    • Automatic Video Clamp
    • Three Digitizing Channels, Each With Independently Controllable Clamp, Gain, Offset, and Analog-to-Digital Converter (ADC)
    • Clamping: Selectable Clamping Between Bottom Level and Mid Level
    • Offset: 1024-Step Programmable RGB or YPbPr Offset Control
    • Gain: 8-Bit Programmable Gain Control
    • ADC: 10-Bit 90-MSPS A/D Converter
    • Automatic Level Control (ALC) Circuit
    • Composite Sync: Integrated Sync-on-Green Extraction From Green/Luminance Channel
    • Support for DC- and AC-Coupled Input Signals
    • Programmable Video Bandwidth Control
    • Supports Component Video Standards 480i, 576i, 480p, 576p, 720p, and 1080i
    • Supports PC Graphics Inputs up to 90 MSPS
    • Programmable RGB-to-YCbCr Color Space Conversion
  • Horizontal Phase-Locked Loop (PLL)
    • Fully Integrated Horizontal PLL for Pixel Clock Generation
    • 9-MHz to 90-MHz Pixel Clock Generation From HSYNC Input
    • Adjustable Horizontal PLL Loop Bandwidth for Minimum Jitter
    • 5-Bit Programmable Subpixel Accurate Positioning of Sampling Phase
  • Output Formatter
    • Supports 20-bit 4:2:2 Outputs With Embedded Syncs
    • Support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2 Output Modes to Reduce Board Traces
    • Dedicated DATACLK Output With Programmable Output Polarity for Easy Latching of Output Data
  • System
    • Industry-Standard Normal/Fast I2C Interface With Register Readback Capability
    • Space-Saving 100-Pin TQFP Package
    • Thermally-Enhanced PowerPAD Package for Better Heat Dissipation
    • Industrial Temperature Range –40°C to 85°C

The TVP70025I is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces. The device supports pixel rates up to 90 MHz. Therefore, it can be used for PC graphics digitizing up to WXGA (1440 × 900) resolution at a 60-Hz screen refresh rate, and in video environments for the digitizing of digital TV formats, including HDTV up to 1080i.

The TVP70025I is powered from 3.3-V and 1.8-V supply and integrates a triple high-performance analog-to-digital (A/D) converter with clamping functions and variable gain, independently programmable for each channel. The clamp timing window is provided by an external pulse or can be generated internally. The TVP70025I includes analog slicing circuitry on the SOG inputs to support sync-on-luminance or sync-on-green extraction. In addition, TVP70025I can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.

The TVP70025I also contains a complete horizontal phase-locked loop (PLL) block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 9 MHz to 90 MHz.

All programming of the device is done via an industry-standard I2C interface, which supports both reading and writing of register settings. The TVP70025I is available in a space-saving 100-pin TQFP PowerPAD package.

The TVP70025I is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces. The device supports pixel rates up to 90 MHz. Therefore, it can be used for PC graphics digitizing up to WXGA (1440 × 900) resolution at a 60-Hz screen refresh rate, and in video environments for the digitizing of digital TV formats, including HDTV up to 1080i.

The TVP70025I is powered from 3.3-V and 1.8-V supply and integrates a triple high-performance analog-to-digital (A/D) converter with clamping functions and variable gain, independently programmable for each channel. The clamp timing window is provided by an external pulse or can be generated internally. The TVP70025I includes analog slicing circuitry on the SOG inputs to support sync-on-luminance or sync-on-green extraction. In addition, TVP70025I can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.

The TVP70025I also contains a complete horizontal phase-locked loop (PLL) block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 9 MHz to 90 MHz.

All programming of the device is done via an industry-standard I2C interface, which supports both reading and writing of register settings. The TVP70025I is available in a space-saving 100-pin TQFP PowerPAD package.
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TI 不提供設(shè)計支持

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類型 標題 下載最新的英語版本 日期
* 數(shù)據(jù)表 TVP70025I Triple 10-Bit 90-MSPS Video and Graphics Digitizer With Horizontal PLL 數(shù)據(jù)表 (Rev. C) 2013年 4月 24日
應(yīng)用手冊 TVP7002 PCB Layout Guidelines 2010年 6月 16日

設(shè)計和開發(fā)

如需其他信息或資源，請點擊以下任一標題進入詳情頁面查看（如有）。

軟件編程工具

SLEC025 — TVP70025I Setup Files

支持的產(chǎn)品和硬件

支持的產(chǎn)品和硬件

產(chǎn)品
HDMI、DisplayPort 和 MIPI IC
TVP70025I — 具有水平 PLL 的三通道 10 位 90MSPS 視頻和圖形數(shù)字轉(zhuǎn)換器
支持軟件

SLEC029 — TVP7002 + THS8200 EVM Kit Setup

支持的產(chǎn)品和硬件

支持的產(chǎn)品和硬件

產(chǎn)品
HDMI、DisplayPort 和 MIPI IC
THS8200 — 三通道 10 位全格式視頻 DAC TVP7002 — 三通道 8/10 位 165/110MSPS 視頻 ADC TVP70025I — 具有水平 PLL 的三通道 10 位 90MSPS 視頻和圖形數(shù)字轉(zhuǎn)換器
計算工具

SLEC027 — TVP7002, TVP70025i PLL Worksheet

支持的產(chǎn)品和硬件

支持的產(chǎn)品和硬件

產(chǎn)品
HDMI、DisplayPort 和 MIPI IC
TVP7002 — 三通道 8/10 位 165/110MSPS 視頻 ADC TVP70025I — 具有水平 PLL 的三通道 10 位 90MSPS 視頻和圖形數(shù)字轉(zhuǎn)換器
原理圖

TVP70025I PZP OrCAD Symbol

SLER011.ZIP (2 KB)
下載
模擬工具

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借助?PSpice for TI 的設(shè)計和仿真環(huán)境及其內(nèi)置的模型庫，您可對復(fù)雜的混合信號設(shè)計進行仿真。創(chuàng)建完整的終端設(shè)備設(shè)計和原型解決方案，然后再進行布局和制造，可縮短產(chǎn)品上市時間并降低開發(fā)成本。?

在?PSpice for TI 設(shè)計和仿真工具中，您可以搜索 TI (...)
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模擬工具

TINA-TI — 基于 SPICE 的模擬仿真程序

TINA-TI 提供了 SPICE 所有的傳統(tǒng)直流、瞬態(tài)和頻域分析以及更多。TINA 具有廣泛的后處理功能，允許您按照希望的方式設(shè)置結(jié)果的格式。虛擬儀器允許您選擇輸入波形、探針電路節(jié)點電壓和波形。TINA 的原理圖捕獲非常直觀 - 真正的“快速入門”。

TINA-TI 安裝需要大約 500MB。直接安裝，如果想卸載也很容易。我們相信您肯定會愛不釋手。

TINA 是德州儀器 (TI) 專有的 DesignSoft 產(chǎn)品。該免費版本具有完整的功能，但不支持完整版 TINA 所提供的某些其他功能。

如需獲取可用 TINA-TI 模型的完整列表，請參閱：SpiceRack - 完整列表 

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用戶指南: PDF
英語版 (Rev.A): PDF
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封裝 引腳 CAD 符號、封裝和 3D 模型
HTQFP (PZP) 100 Ultra Librarian

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點
  • 封裝廠地點

支持和培訓(xùn)

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