DSD1791
- Supports both DSD and PCM Formats
- 24-Bit Resolution
- Analog Performance:
- Dynamic Range: 113 dB
- THD+N: 0.001%
- Full-Scale Output: 2.1 V RMS (at Postamp)
- Differential Voltage Output: 3.2 Vp-p
- 8× Oversampling Digital Filter:
- Stop-Band Attenuation: –82 dB
- Pass-Band Ripple: ±0.002 dB
- Sampling Frequency: 10 kHz to 200 kHz
- System Clock: 128, 192, 256, 384, 512, or 768 fS With Autodetect
- Accepts 16-, 20-, and 24-Bit PCM Audio Data
- PCM Data Formats: Standard, I2S, and Left-Justified
- DSD Format Interface Available
- Optional Interface to External Digital Filter or DSP Available
- TDMCA Interface Available
- User-Programmable Mode Controls:
- Digital Attenuation: 0 dB to –120 dB, 0.5 dB/Step
- Digital De-Emphasis
- Digital Filter Rolloff: Sharp or Slow
- Soft Mute/PCM Format
- Zero Detect Mute/PCM Format
- Zero Flag for Each Output/PCM and DSD Formats
- Dual Supply Operation:
- 5-V Analog, 3.3-V Digital
- 5-V Tolerant Digital Inputs
- Small 28-Lead SSOP Package
- APPLICATIONS
- A/V Receivers
- SACD Players
- DVD Players
- HDTV Receivers
- Car Audio Systems
- Digital Multitrack Recorders
- Other Applications Requiring 24-Bit Audio
The DSD1791 is a monolithic CMOS integrated circuit that includes stereo digital-to-analog converters and support circuitry in a small 28-lead SSOP package. The data converters use TIs advanced segment DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter. The DSD1791 provides balanced voltage outputs, allowing the user to optimize analog performance externally. The DSD1791 accepts PCM and DSD audio data formats, providing easy interfacing to audio DSP and decoder chips. The DSD1791 also accepts interface to external digital filter devices (DF1704, DF1706, PMD200). Sampling rates up to 200 kHz are supported. A full set of user-programmable functions is accessible through a three-wire serial control port. The DSD1791 also supports the time-division-multiplexed command and audio (TDMCA) data format.
技術(shù)文檔
| 類型 | 標題 | 下載最新的英語版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 數(shù)據(jù)表 | 24-Bit, 192kHz Sampling, Advanced Segment, Audio Stereo DAC 數(shù)據(jù)表 (Rev. B) | 2006年 10月 30日 | |||
| EVM 用戶指南 | DEM-PCM/DSD1791/1793 EVM User's Guide | 2003年 11月 18日 |
設(shè)計和開發(fā)
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| 封裝 | 引腳 | CAD 符號、封裝和 3D 模型 |
|---|---|---|
| SSOP (DB) | 28 | Ultra Librarian |
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