數(shù)據(jù)表
CD54HCT174
- Buffered Positive Edge Triggered Clock
- Asynchronous Common Reset
- Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . -55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il
1μA at VOL, VOH
The HC174 and HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL equivalent loads. The HCT174 is functional as well as, pin compatible to the LS174.
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查看全部 1 | 類型 | 標(biāo)題 | 下載最新的英語(yǔ)版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 數(shù)據(jù)表 | CD54HC174, CD74HC174, CD54HCT174, CD74HCT174 數(shù)據(jù)表 (Rev. C) | 2003年 10月 13日 |
訂購(gòu)和質(zhì)量
包含信息:
- RoHS
- REACH
- 器件標(biāo)識(shí)
- 引腳鍍層/焊球材料
- MSL 等級(jí)/回流焊峰值溫度
- MTBF/時(shí)基故障估算
- 材料成分
- 鑒定摘要
- 持續(xù)可靠性監(jiān)測(cè)
包含信息:
- 制造廠地點(diǎn)
- 封裝廠地點(diǎn)