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ZHCSGC2I June 2017 – March 2024 UCC5310 , UCC5320 , UCC5350 , UCC5390

PRODUCTION DATA

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

D|8
- MSOI002K
DWV|8
- MPDS382B

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購(gòu)信息

6.6 Insulation Specifications for D Package

PARAMETER		TEST CONDITIONS	VALUE	UNIT
PARAMETER		TEST CONDITIONS	D	UNIT
CLR	External Clearance⁽¹⁾	Shortest pin–to-pin distance through air	≥ 4	mm
CPG	External Creepage⁽¹⁾	Shortest pin–to-pin distance across the package surface	≥ 4	mm
DTI	Distance through the insulation	Minimum internal gap (internal clearance)	> 21	μm
CTI	Comparative tracking index	DIN EN 60112 (VDE 0303–11); IEC 60112	> 400	V
	Material Group	According to IEC 60664–1	II
Overvoltage category per IEC 60664-1		Rated mains voltage ≤ 150_VRMS	I-IV
Overvoltage category per IEC 60664-1		Rated mains voltage ≤ 300_VRMS	I-III
DIN V VDE 0884–11: 2017–01⁽²⁾
V_IORM	Maximum repetitive peak isolation voltage	AC voltage (bipolar)	990⁽⁶⁾	V_PK
V_IOWM	Maximum isolation working voltage	AC voltage (sine wave); time dependent dielectric breakdown (TDDB) test	700⁽⁶⁾	V_RMS
V_IOWM	Maximum isolation working voltage	DC Voltage	990⁽⁶⁾	V_DC
V_IOTM	Maximum transient isolation voltage	V_TEST = V_IOTM, t = 60 s (qualification); V_TEST = 1.2 × V_IOTM, t = 1 s (100% production)	4242	V_PK
V_IOSM	Maximum surge isolation voltage⁽³⁾	Test method per IEC 62368-1, 1.2/50-μs waveform, V_TEST = 1.3 × V_IOSM (qualification)	4242	V_PK
q_pd	Apparent charge⁽⁴⁾	Method a: After I/O safety test subgroup 2/3, V_ini = V_IOTM, t_ini = 60 s V_pd(m) = 1.2 × V_IORM, t_m = 10 s	≤ 5	pC
		Method a: After environmental tests subgroup 1, V_ini = V_IOTM, t_ini = 60 s; V_pd(m) = 1.2 × V_IORM, t_m = 10 s	≤ 5
		Method b1: At routine test (100% production) and preconditioning (type test), V_ini = 1.2 x V_IOTM, t_ini = 1 s; V_pd(m) = 1.5 × V_IORM, t_m = 1 s	≤ 5
C_IO	Barrier capacitance, input to output⁽⁵⁾	V_IO = 0.4 × sin (2πft), f = 1 MHz	1.2	pF
R_IO	Isolation resistance, input to output⁽⁵⁾	V_IO = 500 V, T_A = 25°C	> 10¹²	Ω
		V_IO = 500 V, 100°C ≤ T_A ≤ 125°C	> 10¹¹
		V_IO = 500 V at T_S = 150°C	> 10⁹
	Pollution degree		2
	Climatic category		40/125/21
UL 1577
V_ISO	Withstand isolation voltage	V_TEST = V_ISO, t = 60 s (qualification); V_TEST = 1.2 × V_ISO, t = 1 s (100% production)	3000	V_RMS

(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications.

(2) This coupler is suitable for basic electrical insulation only within the maximum operating ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.

(3) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.

(4) Apparent charge is electrical discharge caused by a partial discharge (pd).

(5) All pins on each side of the barrier tied together creating a two-pin device.

(6) System isolation working voltages need to be verified according to application parameters.