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ZHCSFK9C September 2016 – October 2024 UCC28950-Q1 , UCC28951-Q1

PRODUCTION DATA

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

PW|24
- MPDS363A

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購(gòu)信息

5.5 Electrical Characteristics

V_DD = 12V, T_A = T_J = –40°C to +125°C, C_VDD = 1μF, C_REF = 1μF, R_AB = 22.6kΩ, R_CD = 22.6kΩ , R_EF = 13.3kΩ, R_SUM = 124kΩ, R_TMIN = 88.7kΩ, R_T = 59kΩ connected between RT pin and 5V voltage supply to set F_SW = 100kHz (F_OSC = 200kHz) (unless otherwise noted). All component designations are from Figure 7-3.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
UNDERVOLTAGE LOCKOUT (UVLO)
UVLO_RTH	Start threshold		6.75		7.9	V
UVLO_RTH	Start threshold	T_A = 25°C		7.3		V
UVLO_FTH	Minimum operating voltage after start		6.15		7.2	V
UVLO_FTH	Minimum operating voltage after start	T_A = 25°C		6.7		V
UVLO_HYST	Hysteresis		0.53		0.75	V
UVLO_HYST	Hysteresis	T_A = 25°C		0.6		V
SUPPLY CURRENTS
I_DD(off)	Startup current	V_DD = 5.2V			270	μA
I_DD(off)	Startup current	V_DD = 5.2V, T_A = 25°C		150		μA
I_DD	Operating supply current				10	mA
I_DD	Operating supply current	T_A = 25°C		5		mA
VREF OUTPUT VOLTAGE
V_REF	VREF total output range	0 ≤ I_R ≤ 20mA, 8V ≤ V_DD ≤ 17V	4.925		5.075	V
V_REF	VREF total output range	0 ≤ I_R ≤ 20mA, 8V ≤ V_DD ≤ 17V, T_A = 25°C		5		V
I_SCC	Short circuit current	V_REF = 0V	–53		–23	mA
SWITCHING FREQUENCY (? OF INTERNAL OSCILLATOR FREQUENCY F_OSC)
F_SW(nom)	Total range		92		108	kHz
F_SW(nom)	Total range	T_A = 25°C		100		kHz
D_MAX	Maximum duty cycle				97%
D_MAX	Maximum duty cycle	T_A = 25°C		95%
SYNCHRONIZATION
PH_SYNC	Total range	R_T = 59kΩ between RT and GND, Input pulses 200kHz, D = 0.5 at SYNC	85		95	°PH
PH_SYNC	Total range	R_T = 59kΩ between RT and GND, Input pulses 200kHz, D = 0.5 at SYNC, T_A = 25°C		90		°PH
F_SYNC	Total range	R_T = 59kΩ between RT and 5V; –40 °C ≤ T_J ≤ 125°C	180		220	kHz
F_SYNC	Total range	T_A = 25°C		200		kHz
T_PW	Pulse width		2.2		2.8	μs
T_PW	Pulse width	T_A = 25°C		2.5		μs
ERROR AMPLIFIER
V_ICM	Common-mode input voltage range	V_ICM range ensures parameters, the functionality ensured for 3.6V < V_ICM < VREF + 0.4V, and –0.4V < V_ICM < 0.5V	0.5		3.6	V
V_IO	Offset voltage		– 7		7	mV
I_BIAS	Input bias current		–1		1	μA
EA_HIGH	High-level output voltage	V_(EA+) – V_(EA–) = 500mV, I_EAOUT = –0.5mA	3.9			V
EA_HIGH	High-level output voltage	V_(EA+) – V_(EA–) = 500mV, I_EAOUT = –0.5mA, T_A = 25°C		4.25		V
EA_LOW	Low-level output voltage	V_(EA+) – V_(EA–) = –500mV, I_EAOUT = 0.5mA			0.35	V
EA_LOW	Low-level output voltage	V_(EA+) – V_(EA–) = –500mV, I_EAOUT = 0.5mA, T_A = 25°C		0.25		V
I_SOURCE	Error amplifier source current		–8		–0.5	mA
I_SOURCE	Error amplifier source current	T_A = 25°C		–3.75		mA
I_SINK	Error amplifier sink current		2.7		5.75	mA
I_SINK	Error amplifier sink current	T_A = 25°C		4.6		mA
I_VOL	Open-loop DC gain	T_A = 25°C		100		dB
GBW	Unity gain bandwidth⁽¹⁾	T_A = 25°C		3		MHz
CYCLE-BY-CYCLE CURRENT LIMIT
V_{CS_LIM}	CS pin cycle-by-cycle threshold		1.94		2.06	V
V_{CS_LIM}	CS pin cycle-by-cycle threshold	T_A = 25°C		2		V
INTERNAL HICCUP MODE SETTINGS
I_DS	Discharge current to set cycle-by-cycle current limit duration	V_CS = 2.5V, V_VSS = 4V	15		25	μA
I_DS		V_CS = 2.5V, V_VSS = 4V, T_A = 25°C		20		μA
V_HCC	Hiccup OFF time threshold		3.2		4.2	V
V_HCC	Hiccup OFF time threshold	T_A = 25°C		3.6		V
I_HCC	Discharge current to set Hiccup Mode OFF Time		1.9		3.2	μA
I_HCC	Discharge current to set Hiccup Mode OFF Time	T_A = 25°C		2.55		μA
SOFT START/ENABLE
I_SS	Charge current	V_SS = 0V	20		30	μA
I_SS	Charge current	T_A = 25°C		25		μA
V_{SS_STD}	Shutdown, restart threshold		0.25		0.7	V
V_{SS_STD}	Shutdown, restart threshold	T_A = 25°C		0.5		V
V_{SS_PU}	Pullup threshold		3.3		4.3	V
V_{SS_PU}	Pullup threshold	T_A = 25°C		3.7		V
V_{SS_CL}	Clamp voltage		4.2		4.95	V
V_{SS_CL}	Clamp voltage	T_A = 25°C		4.65		V
LIGHT-LOAD EFFICIENCY CIRCUIT
V_DCM	DCM threshold	V_DCM = 0.4V, Sweep CS confirm there are OUTE and OUTF pulses, T_A = 25°C	0.37	0.39	0.41	V
		V_DCM = 0.4V, Sweep CS, confirm there are OUTE and OUTF pulses, 0°C ≤ T_A ≤ 85°CDCM threshold, ⁽⁶⁾	0.364	0.39	0.416	V
		V_DCM = 0.4V, Sweep CS, confirm there are OUTE and OUTF pulses, –40°C ≤ T_A ≤ 125°C⁽⁶⁾	0.35	0.39	0.43	V
I_{DCM_SRC}	DCM Sourcing Current	CS < DCM threshold	14		26	μA
I_{DCM_SRC}	DCM Sourcing Current	CS < DCM threshold, T_A = 25°C		20		μA
OUTPUTS OUTA, OUTB, OUTC, OUTD, OUTE, OUTF
I_SINK/SRC	Sink and source peak current⁽⁶⁾	T_A = 25°C		0.2		A
R_SRC	Output source resistance	I_OUT = 20mA	10		35	Ω
R_SRC	Output source resistance	I_OUT = 20mA, T_A = 25°C		20		Ω
R_SINK	Output sink resistance	I_OUT = 20mA	5		30	Ω
R_SINK	Output sink resistance	I_OUT = 20mA, T_A = 25°C		10		Ω
THERMAL SHUTDOWN
	Rising threshold⁽⁶⁾	T_A = 25°C		160		°C
	Falling threshold⁽⁶⁾	T_A = 25°C		140		°C
	Hysteresis			20		°C

(1) See Figure 6-1 for timing diagram and T_ABSET1, T_ABSET2, T_CDSET1, T_CDSET2 definitions.

(2) See Figure 6-4 for timing diagram and T_AFSET1, T_AFSET2, T_BESET1, T_BESET2 definitions.

(3) Pair of outputs OUTC, OUTE and OUTD, OUTF always going high simultaneously.

(4) Outputs A or B are never allowed to go high if both outputs OUTE and OUTF are high.

(5) All delay settings are measured relative to 50% of pulse amplitude.

(6) Verified during characterization only.