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ZHCSON0A August 2022 – September 2023 TPSM8D6B24

PRODUCTION DATA

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

MOW|59

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購信息

7.6.74 (B1h) USER_DATA_01 (COMPENSATION_CONFIG)

CMD Address	B1h
Write Transaction:	Write Block
Read Transaction:	Read Block
Format:	Unsigned Binary (5 bytes)
Phased:	No
NVM Backup:	EEPROM or Pin Detection
Updates:	Conversion Disable: on-the-fly. Conversion Enable: hardware update blocked. To update hardware after write while enabled, store to NVM with (15h) STORE_USER_ALL and (16h) RESTORE_USER_ALL or cycle AVIN below UVLO.

Configure the control loop compensation.

Figure 7-80 (B1h) USER_DATA_01 (COMPENSATION_CONFIG) Register Map

39	38	37	36	35	34	33	32
RW	RW	RW	RW	RW	RW	RW	RW
SEL_CZI[1:0]		SEL_CPI[4:0]					SEL_CZI_MUL

31	30	29	28	27	26	25	24
R	RW	RW	RW	RW	RW	RW	RW
SEL_RVI[5:0]						SEL_CZI[3:2]

23	22	21	20	19	18	17	16
RW	RW	RW	RW	RW	RW	RW	RW
SEL_CZV[1:0]		SEL_CPV[4:0]					0

15	14	13	12	11	10	9	8
RW	RW	RW	RW	RW	RW	RW	RW
SEL_RVV[5:0]						SEL_CZV[3:2]

7	6	5	4	3	2	1	0
RW	RW	RW	RW	RW	RW	RW	RW
0	0	SEL_GMV[1:0]		0	0	SEL_GMI[1:0]

LEGEND: R/W = Read/Write; R = Read only

Table 7-91 Register Field Descriptions

Bit	Field	Access	Reset	Description
25:24,39:38	SEL_CZI[3:0]	RW	NVM	Selects the value of current loop integrating capacitor. CZI = 6.66 pF x CZI_MUL × 2^SEL_GMI[1:0] × SEL_CZI[3:0]
37:33	SEL_CPI[4:0]	RW	NVM	Selects the value of current loop filter capacitor. CPI = 3.2 pF × SEL_CPI[4:0]
32	SEL_CZI_MUL	RW	NVM	Selects the value of current loop integrating capacitor multiplier. 0b: CZI_MUL = 1 1b: CZI_MUL = 2
31:26	SEL_RVI[5:0]	RW	NVM	Selects the value of current loop mid-band gain resistor. RVI = 5 kΩ × SEL_RVI[5:0]
9:8, 23:22	SEL_CZV[3:0]	RW	NVM	Selects the value of voltage loop integrating capacitor. CZV = 125 pF × 2^SEL_GMV[1:0] × SEL_CZV[3:0]
21:17	SEL_CPV[4:0]	RW	NVM	Selects the value of voltage loop filter capacitor. CPV = 6.25 pF × SEL_CPV[4:0]
16	Reserved	RW	NVM	Reserved, set to 0b.
15:10	SEL_RVV[5:0]	RW	NVM	Selects the value of voltage loop mid-band gain resistor. RVV = 5 kΩ × SEL_RVV[5:0]
7:6	Reserved	RW	NVM	Reserved, set to 00b.
5:4	SEL_GMV[1:0]	RW	NVM	Selects the value of voltage error transconductance. GMV = 25 μS × 2^SEL_GMV[1:0]
3:2	Reserved	RW	NVM	Reserved, set to 00b.
1:0	SEL_GMI[1:0]	RW	NVM	Selects the value of current error transconductance. GMI = 25 μS × 2^SEL_GMI[1:0]

(B1h) USER_DATA_01 (COMPENSATION_CONFIG) can be written to while output conversion is enabled, but updating those values to hardware are blocked. To update the value used by the control loop:

Disable conversion, then write to (B1h) USER_DATA_01 (COMPENSATION_CONFIG).
Write to (B1h) USER_DATA_01 (COMPENSATION_CONFIG) while conversion is enabled, store PMBus values to NVM using (15h) STORE_USER_ALL, clear the (B1h) USER_DATA_01 (COMPENSATION_CONFIG) bit in (EEh) MFR_SPECIFIC_30 (PIN_DETECT_OVERRIDE), then cycle AVIN or use the (16h) RESTORE_USER_ALL command.

Due to the complexity of translating the 5-byte HEX value of (B1h) USER_DATA_01 (COMPENSATION_CONFIG) into analog compensation values, TI recommends using the tools available on the TPSM8D6B24 product folder such as the TPS546x24A Compensation and Pin-Strap Resistor Calculator design tool.