ZHCSP41 January 2022 TPSM5D1806E
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Adjustable Output Voltage
- 7.3.2 Frequency Selection
- 7.3.3 Minimum and Maximum Input Voltage
- 7.3.4 Recommended Settings
- 7.3.5 Device Mode Configuration
- 7.3.6 Input Capacitors
- 7.3.7 Minimum Required Output Capacitance
- 7.3.8 Ambient Temperature Versus Total Power Dissipation
- 7.3.9 Remote Sense
- 7.3.10 Enable (EN) and Undervoltage Lockout (UVLO)
- 7.3.11 Soft Start
- 7.3.12 Power Good
- 7.3.13 Safe Start-Up into Pre-Biased Outputs
- 7.3.14 BP5
- 7.3.15 Overcurrent Protection
- 7.3.16 Thermal Shutdown
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RDB|51
散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
6.7 Typical Characteristics (VIN = 5 V)
TA = 25°C unless otherwise noted
Figure 6-8 Efficiency vs Output Current
| Fsw = 1.5 MHz | Dual 1.2-V outputs | IOUT1 = IOUT2 |
| Fsw = 2.0 MHz | Dual 3.3-V outputs | IOUT1 = IOUT2 |
Figure 6-9 Power
Dissipation vs Output Current
| Fsw = 1.0 MHz | Dual 0.8-V outputs | IOUT1 = IOUT2 |
| Fsw = 1.5 MHz | Dual 1.8-V outputs | IOUT1 = IOUT2 |