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ZHCSMP6A November 2020 – December 2021 TPS7H4010-SEP

PRODUCTION DATA

封裝選項(xiàng)

請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

機(jī)械數(shù)據(jù) (封裝 | 引腳)

RNP|30
KGD|0

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

RNP|30
- QFND667

訂購信息

6.5 Electrical Characteristics

Limits apply over the recommended operating junction temperature (T_J) range of –55°C to +125°C, unless otherwise stated. Minimum and maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at T_J = 25°C, and are provided for reference purposes only. Unless otherwise stated, V_IN = 12 V.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (PVIN PINS)
PVIN	Operating input voltage		3.5		32	V
I_SD	Shutdown quiescent current; measured at PVIN pin⁽¹⁾	V_EN = AGND, T_J = 25°C		0.8	10	μA
I_{Q_NONSW}	Operating quiescent current from PVIN (non-switching)	V_EN = 2 V, V_FB = 1.5 V, V_BIAS = 3.3 V external		0.6	12	μA
ENABLE (EN PIN)
V_{EN_VCC_H}	Enable input high level for V_CC output	V_EN rising			1.15	V
V_{EN_VCC_L}	Enable input low level for V_CC output	V_EN falling	0.3			V
V_{EN_VOUT_H}	Enable input high level for V_OUT	V_EN rising	1.14	1.196	1.25	V
V_{EN_VOUT_HYS}	Enable input hysteresis for V_OUT	V_EN falling hysteresis		100		mV
I_{LKG_EN}	Enable input leakage current	V_EN = 2 V		1.4	200	nA
INTERNAL LDO (VCC PIN, BIAS PIN)
V_CC	Internal V_CC voltage	PWM operation		3.27		V
V_CC	Internal V_CC voltage	PFM operation		3.1		V
V_{CC_UVLO}	Internal V_CC undervoltage lockout	V_CC rising	2.96	3.14	3.27	V
V_{CC_UVLO}	Internal V_CC undervoltage lockout	V_CC falling hysteresis		605		mV
V_{BIAS_ON}	Input changeover	V_BIAS rising		3.09	3.25	V
V_{BIAS_ON}	Input changeover	V_BIAS falling hysteresis		63		mV
I_{BIAS_NONSW}	Operating quiescent current from external V_BIAS (non-switching)	V_EN = 2 V, V_FB = 1.5 V, V_BIAS = 3.3 V external		21	50	μA
VOLTAGE REFERENCE (FB PIN)
V_FB	Feedback voltage	PWM mode	0.987	1.006	1.017	V
I_{LKG_FB}	Input leakage current at FB pin	V_FB = 1 V		0.2	60	nA
HIGH SIDE DRIVER (CBOOT PIN)
V_{CBOOT_UVLO}	CBOOT - SW undervoltage lockout		1.6	2.2	2.7	V
CURRENT LIMITS AND HICCUP
I_{HS_LIMIT}	Short-circuit, high-side current limit⁽²⁾		7.4	8.7	9.85	A
I_{LS_LIMIT}	Low-side current limit⁽²⁾		5.8	6.6	7.25	A
I_{NEG_LIMIT}	Negative current limit			–5		A
V_HICCUP	Hiccup threshold on FB pin		0.36	0.4	0.44	V
I_{L_ZC}	Zero cross-current limit			–0.05		A
SOFT START (SS/TRK PIN)
I_SSC	Soft-start charge current		1.8	2	2.2	μA
R_SSD	Soft-start discharge resistance	UVLO, TSD, OCP, or EN = AGND		1		k?
POWER GOOD (PGOOD PIN) and OVERVOLTAGE PROTECTION
V_{PGOOD_OV}	Power-good overvoltage threshold	% of FB voltage	106%	110%	113%
V_{PGOOD_UV}	Power-good undervoltage threshold	% of FB voltage	86%	90%	93%
V_{PGOOD_HYS}	Power-good hysteresis	% of FB voltage		1.2%
V_{PGOOD_VALID}	Minimum input voltage for proper PGOOD function	50-μA pullup to PGOOD pin, V_EN = AGND, T_J = 25℃		1.3	2	V
R_PGOOD	Power-good ON-resistance	V_EN = 2.5 V		40	100	?
R_PGOOD	Power-good ON-resistance	V_EN = AGND		30	90	?
MOSFETS
R_{DS_ON_HS}⁽³⁾	High-side MOSFET ON-resistance	I_OUT = 1 A, V_BIAS = V_OUT = 3.3 V		53	90	mΩ
R_{DS_ON_LS}⁽³⁾	Low-side MOSFET ON-resistance	I_OUT = 1 A, V_BIAS = V_OUT = 3.3 V		31	55	mΩ
THERMAL SHUTDOWN
T_SD⁽⁴⁾	Thermal shutdown threshold	Shutdown threshold		160		°C
T_SD⁽⁴⁾	Recovery threshold			135		°C

(1) Shutdown current includes leakage current of the switching transistors.

(2) This current limit was measured as the internal comparator trip point. Due to inherent delays in the current limit comparator and drivers, the peak current limit measured in closed loop with faster slew rate will be larger, and valley current limit will be lower.

(3) Measured at pins.

(4) Ensured by design.