ZHCSRP2B February 2023 – December 2023 TPS7H3302-SEP , TPS7H3302-SP
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Device Options
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 VDD Capacitor
- 8.2.2.2 VLDO Input Capacitor
- 8.2.2.3 VTT Output Capacitor
- 8.2.2.4 VTTSNS Connection
- 8.2.2.5 Low VDD Applications
- 8.2.2.6 S3 and Pseudo-S5 Support
- 8.2.2.7 Tracking Startup and Shutdown
- 8.2.2.8 Output Tolerance Consideration for VTT DIMM or Module Applications
- 8.2.2.9 LDO Design Guidelines
- 8.2.3 Application Curve
- 8.3 Power Supply Recommendations
- 8.4 Layout
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機械數(shù)據(jù) (封裝 | 引腳)
- DAP|32
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- DAP|32
訂購信息
6.6 Typical Characteristics
For Figure 6-1through Figure 6-11, (3 × 150-μF tantalum + 4 × 4.7-μF MLCC) or equivalent capacitance/ESR are used on VTT output
| VDD = 3.6 V | VDDQSNS = 2.5 |
| VDD = 3.6 V | VDDQSNS = 1.5 V |
| VDD = 3.6 V | VDDQSNS = 1.2 V |
| VDDQSNS = 1.8V |
| VDDQSNS = 1.35 V |
| VDD = 3.6 V |
| VDD = 3.6 V | VDDQSNS = 1.8 V |
| VDD = 3.6 V | VDDQSNS = 1.35 V |
| VDDQSNS = 2.5 V |
| VDDQSNS = 1.5 V |
| VDDQSNS = 1.2V |