ZHCSRP2B February 2023 – December 2023 TPS7H3302-SEP , TPS7H3302-SP
PRODUCTION DATA
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
TPS7H3302 is designed to support DDR, DDR2, DDR3, DDR3L, and DDR4 VTT applications. TPS7H3302 VLDOIN supports voltage range from 0.9 V to 3.5 V. The supply must be well regulated. Having a separate VLDOIN supply from DDR VDDQ allows designer to optimize system efficiency. VDD is used to bias the TPS7H3302 IC and its voltage range from 2.375 V to 3.5 V. This supply must be well regulated and bypassed with a ceramic capacitor with a value of 1 μF and 10 μF. TI recommends that VLDOIN and DDR supply VDDQ be isolated from each other. If this is not possible then an RC filter must be used to isolate VLDOIN and VDDQSNS. However, in so doing the dynamic tracking of VTT and VTTREF will be reduced. See the EVM user's guide SLVUCK2 for additional details.