ZHCSFF4C February 2016 – August 2021 TPS65981
PRODUCTION DATA
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SWD MULTIPLEXER PATH(1) | ||||||
| SWD_RON_U | On resistance of SWD_DATA/CLK to C_USB_TP/TN/BP/BN | Vi = 3.3 V, IO = 20 mA | 35 | 55 | Ω | |
| Vi = 1 V, IO = 20 mA | 30 | 46 | ||||
| SWD_ROND_U | On resistance difference between P and N paths of SWD_DATA/CLK to C_USB_ TP/TN/BP/BN | Vi = 1 V to 3.3 V, IO = 20 mA | –2.5 | 2.5 | Ω | |
| SWD_RON_S | On resistance of SWD_DATA/CLK to C_SBU1/2 | Vi = 3.3 V, IO = 20 mA | 26 | 42 | Ω | |
| Vi = = 1 V, IO = 20 mA | 24 | 37 | ||||
| SWD_ROND_S | On resistance difference between P and N paths of SWD_DATA/CLK to C_SBU1/2 | Vi = 1 V to 3.3 V, IO = 20 mA | –1.5 | 1.5 | Ω | |
| SWD_TON | Switch-on time from enable of SWD path | Time from enable bit with charge pump off | 150 | μs | ||
| Time from enable bit at charge-pump steady state | 10 | |||||
| SWD_TOFF | Switch-off time from disable of SWD path | Time from disable bit at charge-pump steady state | 500 | ns | ||
| SWD_BW | 3-dB bandwidth of SWD path | CL = 10 pF | 200 | MHz | ||
| DEBUG1 MULTIPLEXER PATH | ||||||
| DB1_RON_U | On resistance DEBUG1 to C_USB_TP/BP | Vi = 3.3 V, IO = 20 mA | 14 | 26 | Ω | |
| Vi = 1 V, IO = 20 mA | 10 | 17 | ||||
| DB1_RON_S | On resistance of DEBUG1 to C_SBU1 | Vi = 3.3 V, IO = 20 mA | 9.5 | 17 | Ω | |
| Vi = 1 V, IO = 20 mA | 6.5 | 12 | ||||
| DB1_TON | Switch-on time from enable of DEBUG path | Time from enable bit with charge pump off | 150 | μs | ||
| Time from enable bit at charge-pump steady state | 10 | |||||
| DB1_TOFF | Switch-off time from disable of DEBUG path | Time from disable bit at charge-pump steady state | 500 | ns | ||
| DB1_BW | 3-dB bandwidth of DEBUG path | CL = 10 pF | 200 | MHz | ||
| AUX MULTIPLEXER PATH(1) | ||||||
| AUX_RON | On resistance of AUX_P/N to C_SBU1/2 | Vi = 3.3 V, IO = 20 mA | 3.5 | 7 | Ω | |
| Vi = 1 V, IO = 20 mA | 2.5 | 5 | ||||
| AUX_ROND | On resistance difference between P and N paths of AUX_P/N to C_SBU1/2 | Vi = 1 V to 3.3 V, IO = 20 mA | –0.25 | 0.25 | Ω | |
| AUX_TON | Switch-on time from enable of AUX_P/N to C_SBU1/2 | Time from enable bit with charge pump off | 150 | μs | ||
| Time from enable bit at charge-pump steady state | 15 | |||||
| AUX_TOFF | Switch-off time from disable of AUX_P/N to C_SBU1/2 | Time from disable bit at charge-pump steady state | 500 | ns | ||
| AUX_BW | 3-dB bandwidth of AUX_P/N to C_SBU1/2 path | CL = 10 pF | 200 | MHz | ||
| USB_RP MULTIPLEXER PATH(1)(2) | ||||||
| USB_RON | On resistance of USB_RP to C_USB_TP/TN/BP/BN | Vi = 3 V, IO = 20 mA | 4.5 | 10 | Ω | |
| Vi = 400 mV, IO = 20 mA | 3 | 7 | ||||
| USB_ROND | On resistance difference between P and N paths of USB_RP to C_USB_TP/TN/BP/BN | Vi = 0.4 V to 3 V, IO = 20 mA | –0.15 | 0.15 | Ω | |
| USB_TON | Switch-on time from enable of USB USB_RP path | Time from enable bit with charge pump off | 150 | μs | ||
| Time from enable bit at charge-pump steady state | 15 | |||||
| USB_TOFF | Switch-off time from disable of USB_RP path | Time from disable bit at charge-pump steady state | 500 | ns | ||
| USB_BW | 3-dB bandwidth of USB_RP path | CL = 10 pF | 850 | MHz | ||
| USB_ISO | Off isolation of USB_RP path | RL = 50 Ω, VI = 800 mV, f = 240 MHz | –19 | dB | ||
| USB_XTLK | Channel to channel crosstalk of USB_RP path | RL = 50 Ω, f = 240 MHz | –26 | dB | ||
| C_SBU1/2 OUTPUT | ||||||
| R_SBU_OPEN | Resistance of the open C_SBU1/2 paths | Vi = 0 V to LDO_3V3 | 1 | MΩ | ||
| R_USB_OPEN | Resistance of the open C_USB_T/B/P/N paths | Vi = 0 V to LDO_3V3 | 1 | MΩ | ||