SLUS534G September 2002 – March 2015 TPS61030 , TPS61031 , TPS61032
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Simplified Schematic
- 5 Revision History
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
- 9 Parameter Measurement Information
- 10Detailed Description
- 11Application and Implementation
- 12Power Supply Recommendations
- 13Layout
- 14Device and Documentation Support
- 15Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7 Pin Configuration and Functions
PWP Package
16-Pins
Top View
RSA Package
16-Pins
Top View
Pin Functions
| PIN | I/O | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | NO. | |||
| PWP | RSA | |||
| EN | 9 | 11 | I | Enable input. (1/VBAT enabled, 0/GND disabled) |
| FB | 12 | 14 | I | Voltage feedback of adjustable versions |
| GND | 11 | 13 | I/O | Control/logic ground |
| LBI | 7 | 9 | I | Low battery comparator input (comparator enabled with EN) |
| LBO | 10 | 12 | O | Low battery comparator output (open drain) |
| NC | 16 | 2 | Not connected | |
| PGND | 3, 4, 5 | 5, 6, 7 | I/O | Power ground |
| PowerPAD™ | Must be soldered to achieve appropriate power dissipation. Should be connected to PGND. | |||
| SYNC | 8 | 10 | I | Enable/disable power save mode (1/VBAT disabled, 0/GND enabled, clock signal for synchronization) |
| SW | 1, 2 | 3, 4 | I | Boost and rectifying switch input |
| VBAT | 6 | 8 | I | Supply voltage |
| VOUT | 13, 14, 15 | 1, 15, 16 | O | DC/DC output |