ZHCSOL9B March 2013 – August 2021 TPS53511
PRODUCTION DATA
Figure 5-1 16-PinRGT Package(Top View)| PIN | I/O/P | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| EN | 6 | I | Enable control input |
| GND | 4 | — | Signal ground pin |
| PG | 5 | O | Open-drain power-good output |
| PGND | 7 | P | Ground returns for low-side MOSFET. Also serves as inputs of current comparators. Connect PGND and GND strongly together near the device. |
| 8 | |||
| SS | 3 | I/O | Soft-start control. An external capacitor should be connected to GND. |
| SW | 9 | I/O | Switch node connection between high-side N-channel FET and low-side N-channel FET. Also serves as inputs to current comparator. |
| 10 | |||
| 11 | |||
| VBST | 12 | I | Supply input for high-side N-channel FET gate driver (boost terminal). Connect a capacitor from this pin to respective SW terminals. An internal PN diode is connected between the VREG5 and VBST pins. |
| VCC | 15 | I | Supply input for 5-V internal linear regulator for the control circuitry. |
| VFB | 1 | I | Converter feedback input. Connect with feedback resistor divider. |
| VIN | 13 | I | Power input and connected to high side N-channel FET drain |
| 14 | |||
| VO | 16 | I | Connect to the output of the converter. This terminal is used for on-time adjustment. |
| VREG5 | 2 | O | 5.5-V power supply output. A capacitor (typical 1-μF) should be connected to GND. |
| PowerPAD | — | Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Should be connected to PGND. | |