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ZHCSHX8D September 2017 – October 2019 TPS50601A-SP

PRODUCTION DATA.

封裝選項

機械數(shù)據 (封裝 | 引腳)

HKH|20
- MCDF004D
KGD|0

散熱焊盤機械數(shù)據 (封裝 | 引腳)

訂購信息

6.5 Electrical Characteristics

T_J = –55°C to 125°C, V_IN = P_VIN = 3.0 V to 7.0 V (unless otherwise noted)

PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
Supply Voltage (VIN AND PVIN Pins)
PVIN operating input voltage		3		7	V
PVIN internal UVLO threshold	PV_IN rising		2.50		V
PVIN internal UVLO hysteresis			450		mV
VIN operating input voltage		3		7	V
VIN internal UVLO threshold	V_IN rising		2.75	3	V
VIN internal UVLO hysteresis			150		mV
VIN shutdown supply current	V_EN = 0 V		1.35	2.5	mA
VIN operating – non switching supply current	V_SENSE = V_BG		5	10	mA
Enable and UVLO (EN Pin)
Enable threshold	Rising		1.14	1.18	V
Enable threshold	Falling	1.05	1.11		V
Input current	V_EN = 1.1 V		6.1		μA
Hysteresis current	V_EN = 1.3 V		3		μA
Voltage Reference
Voltage reference	0 A ≤ Iout ≤ 6 A, –55 to 125°C	0.792	0.804	0.816	V
REFCAP voltage	470 nF		1.211		V
Mosfet
High-side switch resistance	PVIN = V_IN = 3 V, lead length = 4 mm		50		mΩ
High-side switch resistance⁽¹⁾	PVIN = V_IN = 5 V, lead length = 4 mm		45		mΩ
High-side switch resistance⁽¹⁾	PVIN = V_IN = 7 V, lead length = 4 mm		43		mΩ
Low-side switch resistance⁽¹⁾	PVIN = V_IN= 3 V, lead length = 4 mm		35		mΩ
Low-side switch resistance⁽¹⁾	PVIN = V_IN = 5 V, lead length = 4 mm		34		mΩ
Low-side switch resistance⁽¹⁾	PVIN = V_IN = 7 V, lead length = 4 mm		33		mΩ
Error Amplifier
Error amplifier transconductance (g_m)⁽²⁾	–2 μA < I_COMP < 2 μA, V_(COMP) = 1 V	1000	1400	2000	μS
Error amplifier dc gain⁽²⁾	V_SENSE = 0.804 V		10000		V/V
Error amplifier source/sink⁽²⁾	V_(COMP) = 1 V, 100-mV input overdrive	–250	±115	250	μA
Error amplifier output resistance			7		MΩ
Start switching threshold⁽²⁾			0.25		V
COMP to Iswitch gm⁽²⁾			22		S
Current Limit
High-side switch current limit threshold ⁽³⁾	V_IN = 7 V		11		A
Low-side switch sourcing current limit⁽³⁾	V_IN = 7 V		10		A
Low-side switch sinking current limit	V_IN = 7 V		3		A
Thermal Shutdown
Thermal shutdown			170		°C
Thermal shutdown hysteresis			30		°C
Internal Switching Frequency
Internally set frequency	RT = Open	395	500	585	kHz
Externally set frequency	RT = 100 kΩ (1%)	395	500	585	kHz
	RT = 487 kΩ (1%)	85	100	120
	RT = 47 kΩ (1%)	900	1000	1100
External Synchronization
SYNC out low-to-high rise time (10%/90%)	C_LOAD = 25 pF		70	111	ns
SYNC out high-to-low fall time (90%/10%)	C_LOAD= 25 pF		6	15.5	ns
Falling edge delay time⁽⁵⁾			180		°
SYNC out high level threshold	I_OH = 50 µA	V_IN - 0.3			V
SYNC out low level threshold	I_OL = 50 µA			600	mV
SYNC in low level threshold	PVIN = V_IN= 3 V			900	mV
SYNC in high level threshold	PVIN = V_IN = 3 V	2.45			V
SYNC in low level threshold	PVIN = V_IN = 7 V			900	mV
SYNC in high level threshold	PVIN = V_IN = 7 V	4.25			V
SYNC in frequency range⁽⁴⁾		100		1000	kHz
PH (PH Pin)
Minimum on time	Measured at 10% to 90% of VIN, 25°C, I_PH = 2 A		190	235	ns
Slow Start and Tracking (SS/TR Pin)
SS charge current		1.5	2.5	3	μA
SS/TR to VSENSE matching	V_(SS/TR) = 0.4 V		30	90	mV
Power Good (PWRGD Pin)
VSENSE threshold	V_SENSE falling (fault)		91		% VREF
	V_SENSE rising (good)		94
	V_SENSE rising (fault)		109
	V_SENSE falling (good)		106
Output high leakage	V_SENSE = V_REF, V_(PWRGD) = 5 V		30	181	nA
Output low	I_(PWRGD) = 2 mA			0.3	V
Minimum VIN for valid output	V_(PWRGD) < 0.5 V at 100 μA		0.6	1	V
Minimum SS/TR voltage for PWRGD				1.55	V

(1) Measured at pins.

(2) Ensured by design only. Not tested in production.

(3) Parameter is not tested in production.

(4) Parameter is production tested at nominal voltage with V_IN = P_VIN = 5 V.

(5) Bench verified. Not tested in production.